The SY89218U is a 2.5V precision, high-speed, integrated clock divider and LVDS fanout buffer capable of handling clocks up to 1.5GHz. Optimized for communications applications, the four independently controlled output banks are phase-matched and can be configured for pass through (÷1), ÷2 or ÷4 divider ratios.The differential input includes Micrel's unique, 3-pin input termination architecture that allows the user to interface to any differential signal (AC- or DC-coupled) as small as 100mV (200mVPP) without any level shifting or termination resistor networks in the signal path. The low-skew, low-jitter outputs are LVDS compatible with extremely fast rise/fall times guaranteed to be less than 200ps.The /MR (master reset) input asynchronously resets the outputs. A four-clock delay after de-asserting /MR allows the counters to synchronize and start the outputs from the same state without any runt pulse.The SY89218U is part of Micrel's Precision Edge® product family.
Additional Features
Low-skew LVDS output banks with independently programmable ÷1, ÷2 and ÷4 divider options
Four output banks, 15 total outputs
Guaranteed AC performance over temperature and voltage:
Accepts a clock frequency up to 1.5GHz
<1600ps IN-to-OUT propagation delay
<200ps rise/fall time
<35ps within bank skew
Fail Safe Input
Prevents outputs from oscillating
Ultra-low jitter design:
<1psRMS random jitter
<10psPP total jitter (clock)
Patent-pending input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS)
LVDS-compatible outputs
CMOS/TTL-compatible output enable (EN) and divider select control
2.5V ±5% power supply
-40°C to +85°C temperature range
Available in 64-pin TQFP
The SY89218U is a 2.5V precision, high-speed, integrated clock divider and LVDS fanout buffer capable of handling clocks up to 1.5GHz. Optimized for communications applications, the four independently controlled output banks are phase-matched and can be configured for pass through (÷1), ÷2 or ÷4 divider ratios.The differential input includes Micrel's unique, 3-pin input termination architecture that allows the user to interface to any differential signal (AC- or DC-coupled) as small as 100mV (200mVPP) without any level shifting or termination resistor networks in the signal path. The low-skew, low-jitter outputs are LVDS compatible with extremely fast rise/fall times guaranteed to be less than 200ps.The /MR (master reset) input asynchronously resets the outputs. A four-clock delay after de-asserting /MR allows the counters to synchronize and start the outputs from the same state without any runt pulse.The SY89218U is part of Micrel's Precision Edge® product family.
Additional Features
- Low-skew LVDS output banks with independently programmable ÷1, ÷2 and ÷4 divider options
- Four output banks, 15 total outputs
- Guaranteed AC performance over temperature and voltage:
- Accepts a clock frequency up to 1.5GHz
- <1600ps IN-to-OUT propagation delay
- <200ps rise/fall time
- <35ps within bank skew
- Fail Safe Input
- Prevents outputs from oscillating
- Ultra-low jitter design:
- <1psRMS random jitter
- <10psPP total jitter (clock)
- Patent-pending input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS)
- LVDS-compatible outputs
- CMOS/TTL-compatible output enable (EN) and divider select control
- 2.5V ±5% power supply
- -40°C to +85°C temperature range
- Available in 64-pin TQFP
