The PL686-35DC is a low phase noise, LVPECL clock buffer designed for use with 3rd overtone crystals operating in the frequency range of 120MHz to 170MHz. It features an advanced non-multiplier design that ensures high performance, making it suitable for demanding applications such as SONET, WiMax, CPRI, OBSAI, and Fiber Channel. This device offers ultra-low phase noise of -80dBc at 10Hz and phase jitter of less than 60fs RMS, which are critical parameters for high-end clocking applications. The power supply requirement is 3.3V ¬±10%, and it is available in die form, with a die size of 952 microns x 952 microns. The output configuration includes complementary LVPECL outputs, and it supports an external resistor for 3rd overtone selection. The PL686-35DC operates within a temperature range of -40¬8C to 85¬8C and has a supply current of approximately 50mA under standard LVPECL loading conditions. It also features robust ESD protection rated at 2000V. This product is ideal for engineers seeking reliable clock buffering solutions with stringent performance criteria.
Clock Buffer/Driver IC 1:1 170 MHz Die
| Quarktwin Technology Ltd. | |
|---|---|
| Product Category | Gate Drivers |
| Product Number | PL686-35DC |
| Product Name | Clock Buffers, Drivers |
| Output Configuration | Inverting |
| Supply Voltage | 2.97 to 3.63 volts |
| Switching Frequency | 170000 kHz |