Description
Additional Features CPU
Up to 10 MIPS Performance at 3V
C compiler optimized RISC architecture
8x8 Single Cycle Hardware Multiply nanoWatt Power Managed Modes
Run, Idle and SLEEP modes
Idle mode currents down to 5.8uA typical
Sleep mode currents down to 0.1uA typical Analog Features
10-bit ADC, 12 channels, 100K samples per second
Programmable Low Voltage Detection Module
Programmable Brown-out-Reset Module
Two Analog Comparators multiplexing Peripherals
Master Synchronous Serial Port supports SPI™ and I2C™ master and slave mode
EUSART module including LIN bus support
Four Timer modules
Up to 5 PWM outputs
Up to 2 Capture / Compare
