Features
Suitable for bare chip mounting as it has thermal expansion coefficient close to that of silicon and excellent dimensional accuracy and flatness.
Excellent high frequency characteristics are achieved by the low-loss dielectric ceramic and the low-loss conductor.
Downsizing and high integration density can be achieved by the multilayer wiring, the multicavity structure and the surface/buried resistor printing.
The substrate and the cavity can be formed in round, polygonal, concave or convex shape.
Thermal vias can be placed in the bare chip mounting area to improve the thermal conductivity of the substrate.
The use of ceramic material contribute to the excellent heat and humidity resistance and prevents outgas and dust generation.
Products meet EU RoHS requirements
KOA Speer Electronics, Inc.
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Datasheet
Description
Features
Suitable for bare chip mounting as it has thermal expansion coefficient close to that of silicon and excellent dimensional accuracy and flatness.
Excellent high frequency characteristics are achieved by the low-loss dielectric ceramic and the low-loss conductor.
Downsizing and high integration density can be achieved by the multilayer wiring, the multicavity structure and the surface/buried resistor printing.
The substrate and the cavity can be formed in round, polygonal, concave or convex shape.
Thermal vias can be placed in the bare chip mounting area to improve the thermal conductivity of the substrate.
The use of ceramic material contribute to the excellent heat and humidity resistance and prevents outgas and dust generation.
Products meet EU RoHS requirements
Features
Suitable for bare chip mounting as it has thermal expansion coefficient close to that of silicon and excellent dimensional accuracy and flatness.
Excellent high frequency characteristics are achieved by the low-loss dielectric ceramic and the low-loss conductor.
Downsizing and high integration density can be achieved by the multilayer wiring, the multicavity structure and the surface/buried resistor printing.
The substrate and the cavity can be formed in round, polygonal, concave or convex shape.
Thermal vias can be placed in the bare chip mounting area to improve the thermal conductivity of the substrate.
The use of ceramic material contribute to the excellent heat and humidity resistance and prevents outgas and dust generation.
Products meet EU RoHS requirements
Features
Suitable for bare chip mounting as it has thermal expansion coefficient close to that of silicon and excellent dimensional accuracy and flatness.
Excellent high frequency characteristics are achieved by the low-loss dielectric ceramic and the low-loss conductor.
Downsizing and high integration density can be achieved by the multilayer wiring, the multicavity structure and the surface/buried resistor printing.
The substrate and the cavity can be formed in round, polygonal, concave or convex shape.
Thermal vias can be placed in the bare chip mounting area to improve the thermal conductivity of the substrate.
The use of ceramic material contribute to the excellent heat and humidity resistance and prevents outgas and dust generation.
