IPC International, Inc. Performance Standard for Construction of Flip Chip and Chip Scale Bumps J-STD-028

Description
DESCRIPTION This standard establishes construction detail requirements for bumps and other terminal structures used for Flip Chip Scale carriers. The specific standards for different terminations are appropriately matched to a particular interconnection process and include such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The document articulates a set of designations and expectations for product performance for the manufacturer and the user of flip chip or chip scale devices. Recommendations are provided to implement the best commercial practices and evolving process improvements. Developed by IPC and EIA. 36 Pages. Released August 1999.
  • Performance Standard for Construction of Flip Chip and Chip Scale Bumps - J-STD-028 - IPC International, Inc.
    IPC International, Inc.
Description
DESCRIPTION This standard establishes construction detail requirements for bumps and other terminal structures used for Flip Chip Scale carriers. The specific standards for different terminations are appropriately matched to a particular interconnection process and include such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The document articulates a set of designations and expectations for product performance for the manufacturer and the user of flip chip or chip scale devices. Recommendations are provided to implement the best commercial practices and evolving process improvements. Developed by IPC and EIA. 36 Pages. Released August 1999.

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Performance Standard for Construction of Flip Chip and Chip Scale Bumps - J-STD-028 - IPC International, Inc.
IPC International, Inc.
Bannockburn, IL, United States
Performance Standard for Construction of Flip Chip and Chip Scale Bumps
J-STD-028
Performance Standard for Construction of Flip Chip and Chip Scale Bumps J-STD-028
DESCRIPTION This standard establishes construction detail requirements for bumps and other terminal structures used for Flip Chip Scale carriers. The specific standards for different terminations are appropriately matched to a particular interconnection process and include such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The document articulates a set of designations and expectations for product performance for the manufacturer and the user of flip chip or chip scale devices. Recommendations are provided to implement the best commercial practices and evolving process improvements. Developed by IPC and EIA. 36 Pages. Released August 1999.

DESCRIPTION
This standard establishes construction detail requirements for bumps and other terminal structures used for Flip Chip Scale carriers. The specific standards for different terminations are appropriately matched to a particular interconnection process and include such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The document articulates a set of designations and expectations for product performance for the manufacturer and the user of flip chip or chip scale devices. Recommendations are provided to implement the best commercial practices and evolving process improvements. Developed by IPC and EIA. 36 Pages. Released August 1999.

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Technical Specifications

  IPC International, Inc.
Product Category Standards and Technical Documents
Product Number J-STD-028
Product Name Performance Standard for Construction of Flip Chip and Chip Scale Bumps
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