Integrated Device Technology 256 x 18 DualSync FIFO, 3.3V 72V805L15PFI

Description
The 72V805 is a 256 x 18 dual sync FIFO with clocked read and write controls that is functionally equivalent to two 72V205 FIFO ’s in a single package with all associated control, data, and flag lines assigned to independent pins. This FIFO is useful for optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet
Description
The 72V805 is a 256 x 18 dual sync FIFO with clocked read and write controls that is functionally equivalent to two 72V205 FIFO ’s in a single package with all associated control, data, and flag lines assigned to independent pins. This FIFO is useful for optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet

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256 x 18 DualSync FIFO, 3.3V - 72V805L15PFI - Integrated Device Technology
San Jose, CA, USA
256 x 18 DualSync FIFO, 3.3V
72V805L15PFI
256 x 18 DualSync FIFO, 3.3V 72V805L15PFI
The 72V805 is a 256 x 18 dual sync FIFO with clocked read and write controls that is functionally equivalent to two 72V205 FIFO ’s in a single package with all associated control, data, and flag lines assigned to independent pins. This FIFO is useful for optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

The 72V805 is a 256 x 18 dual sync FIFO with clocked read and write controls that is functionally equivalent to two 72V205 FIFO ’s in a single package with all associated control, data, and flag lines assigned to independent pins. This FIFO is useful for optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V805L15PFI
Product Name 256 x 18 DualSync FIFO, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 66 MHz
Operating Temperature -40 to 85 C (-40 to 185 F)
Density 4 kbits
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