Integrated Device Technology 16Q x36 2M Multi-Queue, 3.3V 72V51456L7-5BB8

Description
The 72V51456 multi-queue flow-control device is a single chip within which between 1 and 16 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.
Datasheet
Description
The 72V51456 multi-queue flow-control device is a single chip within which between 1 and 16 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.
Datasheet

Suppliers

Company
Product
Description
Supplier Links
16Q x36 2M Multi-Queue, 3.3V - 72V51456L7-5BB8 - Integrated Device Technology
San Jose, CA, USA
16Q x36 2M Multi-Queue, 3.3V
72V51456L7-5BB8
16Q x36 2M Multi-Queue, 3.3V 72V51456L7-5BB8
The 72V51456 multi-queue flow-control device is a single chip within which between 1 and 16 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.

The 72V51456 multi-queue flow-control device is a single chip within which between 1 and 16 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V51456L7-5BB8
Product Name 16Q x36 2M Multi-Queue, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 133 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 2048 kbits
Unlock Full Specs
to access all available technical data

Similar Products

Logic - FIFOs Memory - 67C4013-10N - Lingto Electronic Limited
Specs
Data Rate 10 MHz
Operating Current 35 mA
View Details
Memory - A2C00051729 A - Quarktwin Technology Ltd.
Infineon Technologies AG
View Details
2 suppliers
Memory - MYXX28HC256 - Micross Components, Inc.
Micross Components, Inc.
Specs
Memory Category EEPROM; EEPROM
Access Time 70 to 250 ns
Operating Temperature -55 to 125 C (-67 to 257 F)
View Details