Integrated Device Technology 4Q x18 2M Multi-Queue, 3.3V 72V51253L7-5BBI

Description
The 72V51253 multi-queue flow-control device is a single chip within which between 1 and 4 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.
Datasheet
Description
The 72V51253 multi-queue flow-control device is a single chip within which between 1 and 4 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.
Datasheet

Suppliers

Company
Product
Description
Supplier Links
4Q x18 2M Multi-Queue, 3.3V - 72V51253L7-5BBI - Integrated Device Technology
San Jose, CA, USA
4Q x18 2M Multi-Queue, 3.3V
72V51253L7-5BBI
4Q x18 2M Multi-Queue, 3.3V 72V51253L7-5BBI
The 72V51253 multi-queue flow-control device is a single chip within which between 1 and 4 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.

The 72V51253 multi-queue flow-control device is a single chip within which between 1 and 4 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V51253L7-5BBI
Product Name 4Q x18 2M Multi-Queue, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 133 MHz
Operating Temperature -40 to 85 C (-40 to 185 F)
Density 2048 kbits
Unlock Full Specs
to access all available technical data

Similar Products

Memory - 6116SA150DB - Lingto Electronic Limited
Rochester Electronics
Specs
Memory Category SRAM; SRAM Chip
Access Time 150 ns
Density 16 kbits
View Details
Flash Memory - 1712194 - RS Components, Ltd.
RS Components, Ltd.
Specs
Memory Category Flash
Number of Words 512 k
Package Type SOIC
View Details
Memory - A2C00045250 A - Quarktwin Technology Ltd.
Infineon Technologies AG
View Details
2 suppliers