Integrated Device Technology 4Q x18 2M Multi-Queue, 3.3V 72V51253L7-5BB

Description
The 72V51253 multi-queue flow-control device is a single chip within which between 1 and 4 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.
Datasheet
Description
The 72V51253 multi-queue flow-control device is a single chip within which between 1 and 4 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.
Datasheet

Suppliers

Company
Product
Description
Supplier Links
4Q x18 2M Multi-Queue, 3.3V - 72V51253L7-5BB - Integrated Device Technology
San Jose, CA, USA
4Q x18 2M Multi-Queue, 3.3V
72V51253L7-5BB
4Q x18 2M Multi-Queue, 3.3V 72V51253L7-5BB
The 72V51253 multi-queue flow-control device is a single chip within which between 1 and 4 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.

The 72V51253 multi-queue flow-control device is a single chip within which between 1 and 4 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V51253L7-5BB
Product Name 4Q x18 2M Multi-Queue, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 133 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 2048 kbits
Unlock Full Specs
to access all available technical data

Similar Products

Flash Memory - 1882682 - RS Components, Ltd.
RS Components, Ltd.
Specs
Memory Category Flash
Access Time 25000 ns
Number of Words 1024 k
View Details
Memory - AS29LV016J - Micross Components, Inc.
Micross Components, Inc.
Specs
Memory Category FLASH
Access Time 50 ns
Operating Temperature -55 to 125 C (-67 to 257 F)
View Details
 - 27C128-30MD - Rochester Electronics
Specs
Memory Category EPROM
Package Type DIP; SBCDIP
View Details
4 suppliers