The 72V3612 is a 3.3V version of the 723612. Two independent 64 x 36 dual-port SRAM FIFOs on board the chip buffer data in opposite directions. Communication between each port can bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bi-directional interface between microprocessors and/or buses with synchronous control.
| Integrated Device Technology | |
|---|---|
| Product Category | Memory Chips |
| Product Number | 72V3612L12PFG |
| Product Name | 64 x 36 x 2 SyncBiFIFO, 3.3V |
| Memory Category | FIFO |
| Logic Family | TTL |
| Data Rate | 83 MHz |
| Operating Temperature | 0 to 70 C (32 to 158 F) |
| Density | 4 kbits |
