Integrated Device Technology 32K x 9 SuperSync FIFO, 3.3V 72V271LA20TF

Description
The 72V271 is a 32K x 9 SuperSync FIFO memory with clocked read and write controls. It’s a functionally compatible version of the 72271 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)
Datasheet
Description
The 72V271 is a 32K x 9 SuperSync FIFO memory with clocked read and write controls. It’s a functionally compatible version of the 72271 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)
Datasheet

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32K x 9 SuperSync FIFO, 3.3V - 72V271LA20TF - Integrated Device Technology
San Jose, CA, USA
32K x 9 SuperSync FIFO, 3.3V
72V271LA20TF
32K x 9 SuperSync FIFO, 3.3V 72V271LA20TF
The 72V271 is a 32K x 9 SuperSync FIFO memory with clocked read and write controls. It’s a functionally compatible version of the 72271 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)

The 72V271 is a 32K x 9 SuperSync FIFO memory with clocked read and write controls. It’s a functionally compatible version of the 72271 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V271LA20TF
Product Name 32K x 9 SuperSync FIFO, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 50 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 288 kbits
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