Integrated Device Technology 2K x 18 SyncFIFO, 3.3V 72V235L15TFGI8

Description
The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet
Description
The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet

Suppliers

Company
Product
Description
Supplier Links
2K x 18 SyncFIFO, 3.3V - 72V235L15TFGI8 - Integrated Device Technology
San Jose, CA, USA
2K x 18 SyncFIFO, 3.3V
72V235L15TFGI8
2K x 18 SyncFIFO, 3.3V 72V235L15TFGI8
The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V235L15TFGI8
Product Name 2K x 18 SyncFIFO, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 66 MHz
Operating Temperature -40 to 85 C (-40 to 185 F)
Density 36 kbits
Unlock Full Specs
to access all available technical data

Similar Products

Memory IC and Storage Component - 2020-1819-0876 - ERSAELECTRONICS PTE. LTD.
Specs
Memory Category Flash
Package Type Tray
View Details
3 suppliers
 - LP3913SQ-AA/NOPB - Rochester Electronics
Texas Instruments
Specs
Memory Category Flash
Package Type WQFN48
View Details
Memory - AS5SP128K32 - Micross Components, Inc.
Micross Components, Inc.
Specs
Memory Category SSRAM; SRAM Chip
Operating Temperature -55 to 125 C (-67 to 257 F)
Density 1024 kbits
View Details