Integrated Device Technology 2K x 18 SyncFIFO, 3.3V 72V235L15TFGI

Description
The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet
Description
The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet

Suppliers

Company
Product
Description
Supplier Links
2K x 18 SyncFIFO, 3.3V - 72V235L15TFGI - Integrated Device Technology
San Jose, CA, USA
2K x 18 SyncFIFO, 3.3V
72V235L15TFGI
2K x 18 SyncFIFO, 3.3V 72V235L15TFGI
The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V235L15TFGI
Product Name 2K x 18 SyncFIFO, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 66 MHz
Operating Temperature -40 to 85 C (-40 to 185 F)
Density 36 kbits
Unlock Full Specs
to access all available technical data

Similar Products

SN74V245 4096 x 18 Synchronous FIFO Memory - SN74V245-20PAG - Texas Instruments
Specs
Memory Category FIFO
Package Type TQFP
View Details
6 suppliers
SDRAM - 2420777P - RS Components, Ltd.
RS Components, Ltd.
Specs
Memory Category DRAM Chip
Access Time 0.4000 ns
Number of Words 64000 k
View Details
Memory - 520366231286 - Lingto Electronic Limited
Infineon Technologies AG
View Details
2 suppliers
Memory - 6116SA45TPG - Lingto Electronic Limited
Rochester Electronics
Specs
Memory Category SRAM; SRAM Chip
Access Time 45 ns
Density 16 kbits
View Details