Integrated Device Technology 512 x 18 SyncFIFO, 3.3V 72V215L15TFGI8

Description
The 72V215 is a 512 x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72215 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet
Description
The 72V215 is a 512 x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72215 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet

Suppliers

Company
Product
Description
Supplier Links
512 x 18 SyncFIFO, 3.3V - 72V215L15TFGI8 - Integrated Device Technology
San Jose, CA, USA
512 x 18 SyncFIFO, 3.3V
72V215L15TFGI8
512 x 18 SyncFIFO, 3.3V 72V215L15TFGI8
The 72V215 is a 512 x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72215 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

The 72V215 is a 512 x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72215 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock( RCLK ) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V215L15TFGI8
Product Name 512 x 18 SyncFIFO, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 66 MHz
Operating Temperature -40 to 85 C (-40 to 185 F)
Density 9 kbits
Unlock Full Specs
to access all available technical data

Similar Products

Memory IC and Storage Component - 736-DP8421AV-20 - ERSAELECTRONICS PTE. LTD.
Specs
Memory Category DRAM Chip
Operating Temperature 0 C (32 F)
Package Type LCC
View Details
4 suppliers
Memory - 28370621 A - Quarktwin Technology Ltd.
Infineon Technologies AG
View Details
2 suppliers
Memory - SMJ27C512 - Micross Components, Inc.
Micross Components, Inc.
Specs
Memory Category EPROM; UVEPROM
Access Time 15 to 25 ns
Operating Temperature -55 to 125 C (-67 to 257 F)
View Details