Integrated Device Technology 256K x 18 / 512K x 9 TeraSync FIFO, 2.5V 72T18115L5BB

Description
The 72T18115 is a 256K x 18 / 512K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.
Datasheet
Description
The 72T18115 is a 256K x 18 / 512K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.
Datasheet

Suppliers

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256K x 18 / 512K x 9 TeraSync FIFO, 2.5V - 72T18115L5BB - Integrated Device Technology
San Jose, CA, USA
256K x 18 / 512K x 9 TeraSync FIFO, 2.5V
72T18115L5BB
256K x 18 / 512K x 9 TeraSync FIFO, 2.5V 72T18115L5BB
The 72T18115 is a 256K x 18 / 512K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.

The 72T18115 is a 256K x 18 / 512K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72T18115L5BB
Product Name 256K x 18 / 512K x 9 TeraSync FIFO, 2.5V
Memory Category FIFO
Logic Family TTL
Data Rate 200 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 4096 kbits
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