Integrated Device Technology 4K x 9 DualAsync FIFO, 5.0V 7284L12PA

Description
The 7284 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user’s option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Datasheet
Description
The 7284 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user’s option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Datasheet

Suppliers

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4K x 9 DualAsync FIFO, 5.0V - 7284L12PA - Integrated Device Technology
San Jose, CA, USA
4K x 9 DualAsync FIFO, 5.0V
7284L12PA
4K x 9 DualAsync FIFO, 5.0V 7284L12PA
The 7284 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user’s option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

The 7284 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user’s option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 7284L12PA
Product Name 4K x 9 DualAsync FIFO, 5.0V
Memory Category FIFO
Logic Family TTL
Access Time 12 ns
Operating Temperature 0 to 70 C (32 to 158 F)
Density 36 kbits
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