Integrated Device Technology 2K x 9 DualAsync FIFO, 5.0V 7283L12PAG8

Description
The 7283 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user’s option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Datasheet
Description
The 7283 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user’s option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Datasheet

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2K x 9 DualAsync FIFO, 5.0V - 7283L12PAG8 - Integrated Device Technology
San Jose, CA, USA
2K x 9 DualAsync FIFO, 5.0V
7283L12PAG8
2K x 9 DualAsync FIFO, 5.0V 7283L12PAG8
The 7283 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user’s option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

The 7283 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user’s option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

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Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 7283L12PAG8
Product Name 2K x 9 DualAsync FIFO, 5.0V
Memory Category FIFO
Logic Family TTL
Access Time 12 ns
Operating Temperature 0 to 70 C (32 to 158 F)
Density 18 kbits
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