Integrated Device Technology 512 x 18 DualSync FIFO, 5.0V 72815LB15PF

Description
The 72815 is a 512 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72215 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet
Description
The 72815 is a 512 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72215 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.
Datasheet

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512 x 18 DualSync FIFO, 5.0V - 72815LB15PF - Integrated Device Technology
San Jose, CA, USA
512 x 18 DualSync FIFO, 5.0V
72815LB15PF
512 x 18 DualSync FIFO, 5.0V 72815LB15PF
The 72815 is a 512 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72215 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

The 72815 is a 512 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72215 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72815LB15PF
Product Name 512 x 18 DualSync FIFO, 5.0V
Memory Category FIFO
Logic Family TTL
Data Rate 66 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 9 kbits
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