Integrated Device Technology 8K x 36 SyncFIFO, 5.0V 723673L12PF8

Description
The 723673 is a 8K x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers. This device can operate in the IDT Standard mode or the First Word Fall Through mode.
Datasheet
Description
The 723673 is a 8K x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers. This device can operate in the IDT Standard mode or the First Word Fall Through mode.
Datasheet

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Supplier Links
8K x 36 SyncFIFO, 5.0V - 723673L12PF8 - Integrated Device Technology
San Jose, CA, USA
8K x 36 SyncFIFO, 5.0V
723673L12PF8
8K x 36 SyncFIFO, 5.0V 723673L12PF8
The 723673 is a 8K x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers. This device can operate in the IDT Standard mode or the First Word Fall Through mode.

The 723673 is a 8K x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers. This device can operate in the IDT Standard mode or the First Word Fall Through mode.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 723673L12PF8
Product Name 8K x 36 SyncFIFO, 5.0V
Memory Category FIFO
Logic Family TTL
Data Rate 83 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 288 kbits
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