Integrated Device Technology 1K x 36 x 2 SyncBiFIFO, 5.0V 723642L15PFG8

Description
The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.
Datasheet
Description
The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.
Datasheet

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1K x 36 x 2 SyncBiFIFO, 5.0V - 723642L15PFG8 - Integrated Device Technology
San Jose, CA, USA
1K x 36 x 2 SyncBiFIFO, 5.0V
723642L15PFG8
1K x 36 x 2 SyncBiFIFO, 5.0V 723642L15PFG8
The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.

The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.

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Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 723642L15PFG8
Product Name 1K x 36 x 2 SyncBiFIFO, 5.0V
Memory Category FIFO
Logic Family TTL
Data Rate 66 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 72 kbits
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