The 72261 is a 16K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)
| Integrated Device Technology | |
|---|---|
| Product Category | Memory Chips |
| Product Number | 72261LA10TF8 |
| Product Name | 16K x 9 SuperSync FIFO, 5.0V |
| Memory Category | FIFO |
| Logic Family | TTL |
| Data Rate | 100 MHz |
| Operating Temperature | 0 to 70 C (32 to 158 F) |
| Density | 144 kbits |
