Integrated Device Technology 512 x 9 AsyncFIFO, 5.0V 7201LA50P

Description
The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit ( RT ) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW . It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
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Description
The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit ( RT ) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW . It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
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512 x 9 AsyncFIFO, 5.0V - 7201LA50P - Integrated Device Technology
San Jose, CA, USA
512 x 9 AsyncFIFO, 5.0V
7201LA50P
512 x 9 AsyncFIFO, 5.0V 7201LA50P
The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit ( RT ) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW . It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit ( RT ) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW . It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

Supplier's Site Datasheet
Logic - Logic - FIFOs Memory - 7201LA50P - 764709-7201LA50P - Win Source Electronics
Laguna Hills, CA, United States
Logic - Logic - FIFOs Memory - 7201LA50P
764709-7201LA50P
Logic - Logic - FIFOs Memory - 7201LA50P 764709-7201LA50P
Manufacturer: IDT, Integrated Device Technology Inc Win Source Part Number: 764709-7201LA50P Series: 7200 Packaging: Tube Mounting Style: Through Hole Operating Temperature Range: 0°C ~ 70°C Package: 28-DIP (0.600", 15.24mm) Operating Supply Voltage: 4.5 V ~ 5.5 V Data Rate: 15MHz Function: Asynchronous Memory Size: 4.5K (512 x 9) Access Time: 50ns Bus Directional: Uni-Directional Expansion Type: Depth, Width Programmable Flags Support: No Retransmit Capability: Yes FWFT Support: No Categories: Integrated Circuits (ICs) Manufacturer Package: 28-PDIP Maximum Supply Current: 80mA Popularity: Medium Fake Threat In the Open Market: 42 pct. Supply and Demand Status: Limited

Manufacturer: IDT, Integrated Device Technology Inc
Win Source Part Number: 764709-7201LA50P
Series: 7200
Packaging: Tube
Mounting Style: Through Hole
Operating Temperature Range: 0°C ~ 70°C
Package: 28-DIP (0.600", 15.24mm)
Operating Supply Voltage: 4.5 V ~ 5.5 V
Data Rate: 15MHz
Function: Asynchronous
Memory Size: 4.5K (512 x 9)
Access Time: 50ns
Bus Directional: Uni-Directional
Expansion Type: Depth, Width
Programmable Flags Support: No
Retransmit Capability: Yes
FWFT Support: No
Categories: Integrated Circuits (ICs)
Manufacturer Package: 28-PDIP
Maximum Supply Current: 80mA
Popularity: Medium
Fake Threat In the Open Market: 42 pct.
Supply and Demand Status: Limited

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Technical Specifications

  Integrated Device Technology Win Source Electronics
Product Category Memory Chips Memory Chips
Product Number 7201LA50P 764709-7201LA50P
Product Name 512 x 9 AsyncFIFO, 5.0V Logic - Logic - FIFOs Memory - 7201LA50P
Memory Category FIFO FIFO
Logic Family TTL
Access Time 50 ns 50 ns
Operating Temperature 0 to 70 C (32 to 158 F) 0 to 70 C (32 to 158 F)
Density 4 kbits
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