Integrated Device Technology 3.3V 512K x 18 Synchronous 3.3V I/O PipeLined SRAM 71V67803S133BG

Description
The 71V67803 3.3V CMOS SRAM is organized as 512K x 18. The 71V67803 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM .
Datasheet
Description
The 71V67803 3.3V CMOS SRAM is organized as 512K x 18. The 71V67803 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM .
Datasheet

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3.3V 512K x 18 Synchronous 3.3V I/O PipeLined SRAM - 71V67803S133BG - Integrated Device Technology
San Jose, CA, USA
3.3V 512K x 18 Synchronous 3.3V I/O PipeLined SRAM
71V67803S133BG
3.3V 512K x 18 Synchronous 3.3V I/O PipeLined SRAM 71V67803S133BG
The 71V67803 3.3V CMOS SRAM is organized as 512K x 18. The 71V67803 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM .

The 71V67803 3.3V CMOS SRAM is organized as 512K x 18. The 71V67803 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM .

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Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 71V67803S133BG
Product Name 3.3V 512K x 18 Synchronous 3.3V I/O PipeLined SRAM
Memory Category SRAM Chip
Operating Temperature 0 to 70 C (32 to 158 F)
Density 512 kbits
Number of Words 512 k
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