The 71V67603 3.3V CMOS SRAM is organized as 256K x 36. The 71V67603 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM .The order of these three addresses are defined by the internal burst counter and the LBO input pin.
| Integrated Device Technology | |
|---|---|
| Product Category | Memory Chips |
| Product Number | 71V67603S133BQI |
| Product Name | 3.3V 256K x 36 Synchronous 3.3V I/O PipeLined SRAM |
| Memory Category | SRAM Chip |
| Data Rate | 133 MHz |
| Operating Temperature | -40 to 85 C (-40 to 185 F) |
| Density | 256 kbits |
| Number of Words | 256 k |
