The 71V65803 3.3V CMOS SRAM organized as 512K X 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM , or Zero Bus Turnaround. The 71V65803 contains data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM .
IC SRAM 9MBIT PARALLEL 119PBGA
SRAM - Synchronous, SDR (ZBT) Memory IC 9Mbit Parallel 100 MHz 5 ns 119-PBGA (14x22)
| Integrated Device Technology | Shenzhen Shengyu Electronics Technology Limited | Quarktwin Technology Ltd. | |
|---|---|---|---|
| Product Category | Memory Chips | Memory Chips | Memory Chips |
| Product Number | 71V65803S100BG | 71V65803S100BG | 71V65803S100BG |
| Product Name | 3.3V 512K x 18 ZBT Synchronous 3.3V I/O PipeLined SRAM | Integrated Circuits (ICs) - Memory - Memory | Memory |
| Memory Category | SRAM Chip | Volatile; SRAM Chip | SRAM; SRAM Chip |
| Data Rate | 100 MHz | 100 MHz | |
| Operating Temperature | 0 to 70 C (32 to 158 F) | 0 to 70 C (32 to 158 F) | |
| Density | 512 kbits | 9000 kbits | 9000 kbits |
| Number of Words | 512 k |
