Integrated Device Technology 3.3V 256K x 18 ZBT Synchronous Flow-Through SRAM w/3.3V I/O 71V3559S85PFG

Description
The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).
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Description
The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).
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Datasheet
Datasheet Summary
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The IDT71V3559S85PFG is a 3.3V synchronous SRAM with a memory configuration of 256K x 18 bits, designed for high-speed applications. It supports a maximum operating frequency of 100 MHz, providing a clock-to-data access time of 7.5 ns. This SRAM features Zero Bus Turnaround (ZBT,Ñ¢), which eliminates dead cycles between read and write operations, enhancing overall system performance. The device includes a burst counter that allows for four cycles of data output for a single address, with the burst order selectable between linear and interleaved modes via the LBO pin. It has three chip enable pins (CE1, CE2, CE2) for easy depth expansion and a single read/write control pin. The outputs are flow-through, meaning there is no output data register, which simplifies the design. The IDT71V3559S85PFG is available in multiple package options, including a 100-pin thin quad flatpack (TQFP), a 119-ball grid array (BGA), and a 165 fine pitch ball grid array (fBGA). It is suitable for both commercial and industrial temperature ranges, making it versatile for various applications.

Datasheet Summary
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The IDT71V3559S85PFG is a 3.3V synchronous SRAM with a memory configuration of 256K x 18 bits, designed for high-speed applications. It supports a maximum operating frequency of 100 MHz, providing a clock-to-data access time of 7.5 ns. This SRAM features Zero Bus Turnaround (ZBT,Ñ¢), which eliminates dead cycles between read and write operations, enhancing overall system performance. The device includes a burst counter that allows for four cycles of data output for a single address, with the burst order selectable between linear and interleaved modes via the LBO pin. It has three chip enable pins (CE1, CE2, CE2) for easy depth expansion and a single read/write control pin. The outputs are flow-through, meaning there is no output data register, which simplifies the design. The IDT71V3559S85PFG is available in multiple package options, including a 100-pin thin quad flatpack (TQFP), a 119-ball grid array (BGA), and a 165 fine pitch ball grid array (fBGA). It is suitable for both commercial and industrial temperature ranges, making it versatile for various applications.

Suppliers

Company
Product
Description
Supplier Links
3.3V 256K x 18 ZBT Synchronous Flow-Through SRAM w/3.3V I/O - 71V3559S85PFG - Integrated Device Technology
San Jose, CA, USA
3.3V 256K x 18 ZBT Synchronous Flow-Through SRAM w/3.3V I/O
71V3559S85PFG
3.3V 256K x 18 ZBT Synchronous Flow-Through SRAM w/3.3V I/O 71V3559S85PFG
The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).

The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).

Supplier's Site Datasheet
 - 71V3559S85PFG - Rochester Electronics
Newburyport, MA, United States
128K X 36, 256K X 18, 3.3V Synchronous ZBT SRAM

128K X 36, 256K X 18, 3.3V Synchronous ZBT SRAM

Supplier's Site Datasheet
Memory - 71V3559S85PFG - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
SRAM - Synchronous, SDR (ZBT) Memory IC 4.5Mbit Parallel 8.5 ns 100-TQFP (14x14)

SRAM - Synchronous, SDR (ZBT) Memory IC 4.5Mbit Parallel 8.5 ns 100-TQFP (14x14)

Buy Now Datasheet
Integrated Circuits (ICs) - Memory - 71V3559S85PFG - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Memory
71V3559S85PFG
Integrated Circuits (ICs) - Memory 71V3559S85PFG
IC SRAM 4.5MBIT PARALLEL 100TQFP

IC SRAM 4.5MBIT PARALLEL 100TQFP

Supplier's Site

Technical Specifications

  Integrated Device Technology Rochester Electronics Quarktwin Technology Ltd. Shenzhen Shengyu Electronics Technology Limited
Product Category Memory Chips Memory Chips Memory Chips Memory Chips
Product Number 71V3559S85PFG 71V3559S85PFG 71V3559S85PFG 71V3559S85PFG
Product Name 3.3V 256K x 18 ZBT Synchronous Flow-Through SRAM w/3.3V I/O Memory Integrated Circuits (ICs) - Memory
Memory Category SRAM Chip SRAM Chip SRAM; SRAM Chip Volatile; SRAM Chip
Cycle Time 85 ns
Operating Temperature 0 to 70 C (32 to 158 F) 0 to 70 C (32 to 158 F) 0 to 70 C (32 to 158 F)
Density 256 kbits 4500 kbits 4500 kbits
Number of Words 256 k
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