The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).
128K X 36, 256K X 18, 3.3V Synchronous ZBT SRAM
SRAM - Synchronous, SDR (ZBT) Memory IC 4.5Mbit Parallel 7.5 ns 165-CABGA (13x15)
IC SRAM 4.5MBIT PAR 165CABGA
| Integrated Device Technology | Rochester Electronics | Quarktwin Technology Ltd. | Shenzhen Shengyu Electronics Technology Limited | |
|---|---|---|---|---|
| Product Category | Memory Chips | Memory Chips | Memory Chips | Memory Chips |
| Product Number | 71V3559S75BQ | 71V3559S75BQ | 71V3559S75BQ | 71V3559S75BQ |
| Product Name | 3.3V 256K x 18 ZBT Synchronous Flow-Through SRAM w/3.3V I/O | Memory | Integrated Circuits (ICs) - Memory - Memory | |
| Memory Category | SRAM Chip | SRAM Chip | SRAM; SRAM Chip | Volatile; SRAM Chip |
| Cycle Time | 75 ns | 7.5 ns | ||
| Operating Temperature | 0 to 70 C (32 to 158 F) | 0 to 70 C (32 to 158 F) | ||
| Density | 256 kbits | 4500 kbits | 4500 kbits | |
| Number of Words | 256 k |
