Integrated Device Technology 3.3V 128K x 36 Synchronous PipeLined Burst SRAM with 2.5V I/O 71V25761S200PFGI

Description
The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM .
Datasheet
Description
The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM .
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3.3V 128K x 36 Synchronous PipeLined Burst SRAM with 2.5V I/O - 71V25761S200PFGI - Integrated Device Technology
San Jose, CA, USA
3.3V 128K x 36 Synchronous PipeLined Burst SRAM with 2.5V I/O
71V25761S200PFGI
3.3V 128K x 36 Synchronous PipeLined Burst SRAM with 2.5V I/O 71V25761S200PFGI
The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM .

The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM .

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Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 71V25761S200PFGI
Product Name 3.3V 128K x 36 Synchronous PipeLined Burst SRAM with 2.5V I/O
Memory Category SRAM Chip
Data Rate 200 MHz
Operating Temperature -40 to 85 C (-40 to 185 F)
Density 4608 kbits
Number of Words 128 k
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