Integrated Device Technology 2.5V 1M x 18 ZBT Synchronous 2.5V I/O Flow-through SRAM 71T75902S75BGG8

Description
The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround.
Datasheet
Description
The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround.
Datasheet

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2.5V 1M x 18 ZBT Synchronous 2.5V I/O Flow-through SRAM - 71T75902S75BGG8 - Integrated Device Technology
San Jose, CA, USA
2.5V 1M x 18 ZBT Synchronous 2.5V I/O Flow-through SRAM
71T75902S75BGG8
2.5V 1M x 18 ZBT Synchronous 2.5V I/O Flow-through SRAM 71T75902S75BGG8
The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround.

The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM , or Zero Bus Turnaround.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 71T75902S75BGG8
Product Name 2.5V 1M x 18 ZBT Synchronous 2.5V I/O Flow-through SRAM
Memory Category SRAM Chip
Cycle Time 75 ns
Operating Temperature 0 to 70 C (32 to 158 F)
Density 18432 kbits
Number of Words 1024 k
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