Integrated Device Technology 2.5V 1M X 18 ZBT Synchronous 2.5V I/O PipeLine SRAM 71T75802S100BGGI

Description
The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM , or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.
Datasheet
Description
The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM , or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.
Datasheet

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2.5V 1M X 18 ZBT Synchronous 2.5V I/O PipeLine SRAM - 71T75802S100BGGI - Integrated Device Technology
San Jose, CA, USA
2.5V 1M X 18 ZBT Synchronous 2.5V I/O PipeLine SRAM
71T75802S100BGGI
2.5V 1M X 18 ZBT Synchronous 2.5V I/O PipeLine SRAM 71T75802S100BGGI
The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM , or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.

The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM , or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.

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Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 71T75802S100BGGI
Product Name 2.5V 1M X 18 ZBT Synchronous 2.5V I/O PipeLine SRAM
Memory Category SRAM Chip
Data Rate 100 MHz
Operating Temperature -40 to 85 C (-40 to 185 F)
Density 18432 kbits
Number of Words 1024 k
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