The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM , or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers.
| Integrated Device Technology | |
|---|---|
| Product Category | Memory Chips |
| Product Number | 71T75602S100BG8 |
| Product Name | 2.5V 512K X 36 ZBT Synchronous 2.5V I/O PipeLine SRAM |
| Memory Category | SRAM Chip |
| Data Rate | 100 MHz |
| Operating Temperature | 0 to 70 C (32 to 158 F) |
| Density | 18432 kbits |
| Number of Words | 512 k |
