Integrated Device Technology 16K x 36 Sync, 3.3V Dual-Port, Pipelined, Interleaved I/O's 70V3569S5DRI

Description
The 70V3569 is a high-speed 16K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1 , permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3569 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device ( VDD ) is at 3.3V.
Datasheet
Description
The 70V3569 is a high-speed 16K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1 , permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3569 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device ( VDD ) is at 3.3V.
Datasheet

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16K x 36 Sync, 3.3V Dual-Port, Pipelined, Interleaved I/O's - 70V3569S5DRI - Integrated Device Technology
San Jose, CA, USA
16K x 36 Sync, 3.3V Dual-Port, Pipelined, Interleaved I/O's
70V3569S5DRI
16K x 36 Sync, 3.3V Dual-Port, Pipelined, Interleaved I/O's 70V3569S5DRI
The 70V3569 is a high-speed 16K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1 , permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3569 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device ( VDD ) is at 3.3V.

The 70V3569 is a high-speed 16K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1 , permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3569 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device ( VDD ) is at 3.3V.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 70V3569S5DRI
Product Name 16K x 36 Sync, 3.3V Dual-Port, Pipelined, Interleaved I/O's
Memory Category DPRAM
Logic Family TTL
Data Rate 100 MHz
Operating Temperature -40 to 85 C (-40 to 185 F)
Density 576 kbits
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