Integrated Device Technology 512K x 18, 3.3V/2.5V Dual-Port RAM, Interleaved I/O's 70T633S10BC

Description
The 70T633 is a high-speed 512K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER / SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1 ) permit the on-chip circuitry of each port to enter a very low standby power mode.
Datasheet
Description
The 70T633 is a high-speed 512K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER / SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1 ) permit the on-chip circuitry of each port to enter a very low standby power mode.
Datasheet

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512K x 18, 3.3V/2.5V Dual-Port RAM, Interleaved I/O's - 70T633S10BC - Integrated Device Technology
San Jose, CA, USA
512K x 18, 3.3V/2.5V Dual-Port RAM, Interleaved I/O's
70T633S10BC
512K x 18, 3.3V/2.5V Dual-Port RAM, Interleaved I/O's 70T633S10BC
The 70T633 is a high-speed 512K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER / SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1 ) permit the on-chip circuitry of each port to enter a very low standby power mode.

The 70T633 is a high-speed 512K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER / SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1 ) permit the on-chip circuitry of each port to enter a very low standby power mode.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 70T633S10BC
Product Name 512K x 18, 3.3V/2.5V Dual-Port RAM, Interleaved I/O's
Memory Category DPRAM
Logic Family TTL
Access Time 10 ns
Operating Temperature 0 to 70 C (32 to 158 F)
Density 9216 kbits
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