Integrated Device Technology 128K x 8 Sync, Dual-Port RAM, Pipelined/Flow-Through 709099L12PF8

Description
The 709099 is a high-speed 128K x 8 bit synchronous Dual- Port RAM . Registers on control, data, and address inputs provide minimal setup and hold times allowing systems to be designed with very short cycle times. With an input data register, it has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1 , permits the on-chip circuitry of each port to enter a very low standby power mode.
Datasheet
Description
The 709099 is a high-speed 128K x 8 bit synchronous Dual- Port RAM . Registers on control, data, and address inputs provide minimal setup and hold times allowing systems to be designed with very short cycle times. With an input data register, it has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1 , permits the on-chip circuitry of each port to enter a very low standby power mode.
Datasheet

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128K x 8 Sync, Dual-Port RAM, Pipelined/Flow-Through - 709099L12PF8 - Integrated Device Technology
San Jose, CA, USA
128K x 8 Sync, Dual-Port RAM, Pipelined/Flow-Through
709099L12PF8
128K x 8 Sync, Dual-Port RAM, Pipelined/Flow-Through 709099L12PF8
The 709099 is a high-speed 128K x 8 bit synchronous Dual- Port RAM . Registers on control, data, and address inputs provide minimal setup and hold times allowing systems to be designed with very short cycle times. With an input data register, it has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1 , permits the on-chip circuitry of each port to enter a very low standby power mode.

The 709099 is a high-speed 128K x 8 bit synchronous Dual- Port RAM . Registers on control, data, and address inputs provide minimal setup and hold times allowing systems to be designed with very short cycle times. With an input data register, it has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1 , permits the on-chip circuitry of each port to enter a very low standby power mode.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 709099L12PF8
Product Name 128K x 8 Sync, Dual-Port RAM, Pipelined/Flow-Through
Memory Category DPRAM
Logic Family TTL
Data Rate 50 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 1024 kbits
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