CYT3DLABHBQ1AESGS belongs to the TRAVEO™ T2G CYT3DL family of microcontrollers. It is based on the highly-efficient embedded processor Arm Cortex-M7 and combines a 2.5D Graphics engine, sound processing, and an Arm® Cortex®-M0+ CPU for peripheral and security processing. Moreover, it includes a WVGA GFX and a 216-pin TEQFP package. It is dedicated to automotive systems such as instrument clusters and Head-Up Displays (HUD).
Summary of Features
32-bit Arm® Cortex®-M7 CPU and 32-bit Arm® Cortex®-M0+ CPU 512 KB code flash, 64 KB work flash and 64 KB SRAM
Up to 50 16-bit and 32 32-bit Timer/Counter Pulse-Width modulator (TCPWM) blocks for regular operations
2,7 to 5.5 Supply Voltage
Supports Enhanced Secure Hardware Extension (eSHE) and Hardware Security Module (HSM)
ASIL-B support (FMEDA)
Up to 61 GPIO pins to wakeup from DeepSleep mode
SMIF speed 100MHz
External Interrupt channel 108
12x SCB / 2x LIN / 4x CAN FD Channels and Ethernet
Four DMA controllers
Peripheral DMA controller #0 (P-DMA0) with 76 channels
Peripheral DMA controller #1 (P-DMA1) with 84 channels
Memory DMA (AHB) controller (M-DMA0) with 8 channels
Memory DMA (AXI) controller (M-DMA1) with 4 channels
-40°C - +105 °C Temperature Range
216-TEQFP Package
Benefits
›Single-chip solution offering automotive function thanks to Arm® Cortex®-M7
Optimized memory footprint for reduced BOM
State-of-the-art security with secure boot support from a dedicated M0+ core and security hardware to accelerate cryptographic functions
Real FOTA support based on security and dual-bank flash
Safety (ASIL-B) features and analysis report › Part of the TRAVEO™ T2G cluster MCU portfolio for a wide range of applications and a high level of software re-us
CYT3DLABHBQ1AESGS belongs to the TRAVEO™ T2G CYT3DL family of microcontrollers. It is based on the highly-efficient embedded processor Arm Cortex-M7 and combines a 2.5D Graphics engine, sound processing, and an Arm® Cortex®-M0+ CPU for peripheral and security processing. Moreover, it includes a WVGA GFX and a 216-pin TEQFP package. It is dedicated to automotive systems such as instrument clusters and Head-Up Displays (HUD).
Summary of Features
- 32-bit Arm® Cortex®-M7 CPU and 32-bit Arm® Cortex®-M0+ CPU 512 KB code flash, 64 KB work flash and 64 KB SRAM
- Up to 50 16-bit and 32 32-bit Timer/Counter Pulse-Width modulator (TCPWM) blocks for regular operations
- 2,7 to 5.5 Supply Voltage
- Supports Enhanced Secure Hardware Extension (eSHE) and Hardware Security Module (HSM)
- ASIL-B support (FMEDA)
- Up to 61 GPIO pins to wakeup from DeepSleep mode
- SMIF speed 100MHz
- External Interrupt channel 108
- 12x SCB / 2x LIN / 4x CAN FD Channels and Ethernet
- Four DMA controllers
- Peripheral DMA controller #0 (P-DMA0) with 76 channels
- Peripheral DMA controller #1 (P-DMA1) with 84 channels
- Memory DMA (AHB) controller (M-DMA0) with 8 channels
- Memory DMA (AXI) controller (M-DMA1) with 4 channels
- -40°C - +105 °C Temperature Range
- 216-TEQFP Package
Benefits
- ›Single-chip solution offering automotive function thanks to Arm® Cortex®-M7
- Optimized memory footprint for reduced BOM
- State-of-the-art security with secure boot support from a dedicated M0+ core and security hardware to accelerate cryptographic functions
- Real FOTA support based on security and dual-bank flash
- Safety (ASIL-B) features and analysis report › Part of the TRAVEO™ T2G cluster MCU portfolio for a wide range of applications and a high level of software re-us
