DIODES Incorporated Logic - Logic - Gates and Inverters - 74AUP2G08RA3-7 74AUP2G08RA3-7

The 74AUP2G08RA3-7 is a dual two-input AND gate from the Advanced Ultra Low Power (AUP) CMOS logic family, designed for low power consumption and extended battery life in portable applications. It operates within a supply voltage range of 0.8V to 3.6V and features push-pull outputs capable of driving ±4mA at 3.0V. The device exhibits low static power consumption, with an ICC of less than 0.9µA, and low dynamic power consumption, with a typical CPD of 6 pF at 3.6V. This logic gate includes Schmitt trigger action on all inputs, providing tolerance for slower input rise and fall times, with a typical hysteresis of 250 mV at VCC = 3.0V. The IOFF circuitry supports partial power-down mode operation, preventing damaging current backflow when powered down. The device also offers robust ESD protection, exceeding 2000V for the Human Body Model and 1000V for the Charged Device Model, along with latch-up immunity exceeding 100mA per JESD 78, Class I. The 74AUP2G08RA3-7 is packaged in a leadless X2-DFN1210-8 format, measuring 1.2mm x 1.0mm x 0.35mm, and is fully RoHS compliant, making it suitable for environmentally conscious designs. It is ideal for applications in battery-operated devices such as tablets, smartphones, and various consumer electronics.