NXP Semiconductors Microprocessors PPC8572EPXARLC

The PPC8572EPXARLC is a dual-core, 32-bit microprocessor from Quarktwin Technology Ltd., based on the Power Architecture technology. It features two high-performance e500 cores, each equipped with a 32-Kbyte L1 instruction cache and a 32-Kbyte L1 data cache, both with parity protection. The processor includes a 1 Mbyte L2 cache that is shared between the cores and supports full ECC on a 64-bit boundary. This microprocessor is designed for embedded applications and includes a memory management unit (MMU) that supports various page sizes from 4 Kbytes to 4 Gbytes. It also features two 64-bit DDR2/DDR3 memory controllers, allowing for a maximum of 16 Gbytes of memory per controller, with full ECC support and programmable timing. The PPC8572EPXARLC supports a range of advanced features, including a signal-processing engine (SPE) for vector operations, embedded floating-point units for both single and double precision, and a programmable interrupt controller compliant with the OpenPIC architecture. It is suitable for applications requiring high performance and reliability in data processing and communication tasks.