The AD9216 is a dual, 3 V, 10-bit, 65/80/105 MSPS analog-to-digital converter. It features dual high performance sample and hold amplifiers and an integrated voltage reference. The AD9216 uses a multistage differential pipelined architecture with output error correction logic to provide 10-bit accuracy and guarantee no missing codes over the full operating temperature range at up to 105 MSPS data rates. The wide bandwidth, differential SHA allows for a variety of user selectable input ranges and offsets including single-ended applications. It is suitable for various applications including multiplexed systems that switch full-scale voltage levels in successive channels and for sampling inputs at frequencies well beyound the Nyquist rate. Dual single-ended clock inputs are used to control all internal conversion cycles. A duty cycle stabilizer is available on the AD9216-65 and can compensate for wide variations in the clock duty cycle, allowing the converters to maintain excellentperformance
. The digital output data is presented in either straight binary or twos complement format. Out-of-range signals indicate an overflow condition, which can be used with the most significant bit to determine low or high overflow. Fabricated on an advanced CMOS process, the AD9216 is available in a space saving 64-lead LFCSP (9x9) and is specified over the industrial temperature range (-40°C to +85°C).
The AD9216 is a dual, 3 V, 10-bit, 65/80/105 MSPS analog-to-digital converter. It features dual high performance sample and hold amplifiers and an integrated voltage reference. The AD9216 uses a multistage differential pipelined architecture with output error correction logic to provide 10-bit accuracy and guarantee no missing codes over the full operating temperature range at up to 105 MSPS data rates. The wide bandwidth, differential SHA allows for a variety of user selectable input ranges and offsets including single-ended applications. It is suitable for various applications including multiplexed systems that switch full-scale voltage levels in successive channels and for sampling inputs at frequencies well beyound the Nyquist rate. Dual single-ended clock inputs are used to control all internal conversion cycles. A duty cycle stabilizer is available on the AD9216-65 and can compensate for wide variations in the clock duty cycle, allowing the converters to maintain excellentperformance. The digital output data is presented in either straight binary or twos complement format. Out-of-range signals indicate an overflow condition, which can be used with the most significant bit to determine low or high overflow. Fabricated on an advanced CMOS process, the AD9216 is available in a space saving 64-lead LFCSP (9x9) and is specified over the industrial temperature range (-40°C to +85°C).
