The AD7476A/AD7477A/AD74
78A are 12-bit, 10-bit, and 8-bit high speed, low power, successive-approxima
tion analog-to-digital converters (ADCs), respectively. The parts operate from a single 2.35 V to 5.25 V power supply and feature throughput rates up to 1 MSPS. The parts contain a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 13 MHz. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge of CS, and the conversion is also initiated at this point. There are no pipeline delays associated with the parts. The AD7476A/AD7477A/ AD7478A use advanced design techniques to achieve low power dissipation at high throughput rates. The reference for the part is taken internally from VDD to allow the widest dynamic input range to the ADC. Thus, the analog input range for the part is 0 V to VDD. The conversion rate is determined by the SCLK.
The AD7476A/AD7477A/AD7478A are 12-bit, 10-bit, and 8-bit high speed, low power, successive-approximation analog-to-digital converters (ADCs), respectively. The parts operate from a single 2.35 V to 5.25 V power supply and feature throughput rates up to 1 MSPS. The parts contain a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 13 MHz. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge of CS, and the conversion is also initiated at this point. There are no pipeline delays associated with the parts. The AD7476A/AD7477A/ AD7478A use advanced design techniques to achieve low power dissipation at high throughput rates. The reference for the part is taken internally from VDD to allow the widest dynamic input range to the ADC. Thus, the analog input range for the part is 0 V to VDD. The conversion rate is determined by the SCLK.
