Analog Devices, Inc. Hard To Find - AD9266BCPZ-65 AD9266BCPZ-65

Manufacturer: Analog Devices Inc.
Win Source Part Number: 1139037-AD9266BCPZ-65
Packaging: Tray
Mounting Style: SMD
Configuration: S/H-ADC
Number of Inputs: 1
Input Type: Differential, Single Ended
Architecture: Pipelined
Sampling Rate (Per Second): 65M
Data Interface: Parallel
Number of A/D Converters: 1
Reference Type: External, Internal
Resolution: 16
Categories: Integrated Circuits
Supplier Device Package: 32-LFCSP-WQ (5x5)
Temperature Range - Operating: -40°C ~ 85°C
Manufacturer Homepage: www.analog.com
Manufacturer Package: 32-WFQFN Exposed Pad, CSP
Popularity: Medium
Fake Threat In the Open Market: 48 pct.
Supply and Demand Status: Limited
Family Part Number: AD9266
Manufacturer Pack Quantity: 1
MSL Level: 3 (168 Hours)
Supply Voltage , Analog: 1.7V ~ 1.9V
Supply Voltage , Digital: 1.7V ~ 3.6V

IC ADC 16BIT PIPELINED 32LFCSP

ADC, Proprietary Method, 16-Bit, 1 Channel, Parallel, Word Access, CMOS

ADC Single 65Msps 16-bit 32-Pin LFCSP - Data Converters - General Purpose ADCs
Delivery on production packaging - Punnet. This product is non-returnable.

ADC Single 65Msps 16-bit 32-Pin LFCSP - Data Converters - General Purpose ADCs

The AD9266 is a monolithic, single-channel 1.8 V supply, 16-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference. The product uses multistage differential pipeline architecture with output error correction logic to provide 16-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input with a selectable internal 1-to-8 divide ratio controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance. The interleaved digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported.The AD9266 is available in a 32-lead RoHS-compliant LFCSP and is specified over the industrial temperature range (-40°C to +85°C).

16 Bit Analog to Digital Converter 1 Input 1 Pipelined 32-LFCSP (5x5)