The Cascade™ SiT95145 is a single-chip MEMS jitter cleaner that provides the highest level of clock tree integration and consolidates multiple clock ICs and oscillators into a single device. Its low noise quad-PLL architecture and programmable output drivers provide up to 10 differential or 20 LVCMOS low-jitter clock outputs. It supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input-to-output frequency translation configurations from 8 kHz to 2.1 GHz.
This jitter cleaner integrates SiTime’s third-generation ApexMEMS™ resonator. This integrated MEMS approach eliminates the dependency on a crystal reference, along with all quartz related issues. It enables a true clock-system-on-a-ch
ip that improves system robustness:
Always-accurate clock synthesis by eliminating crystal capacitive mismatch
Always-reliable startup even at cold temperature and other harsh environmental conditions
No jitter degradation due to noise coupling onto a crystal interface
No activity dips/frequency jumps inherent to quartz
10x more resistant to vibration and board bending
The SiT95145 is supported by TimeMaster™ software to simplify clock tree design. The device can also be shipped with a user-specified, factory pre-programmed default startup configuration. The device configuration can be re-programmed twice using two banks of one-time-programmabl
e (OTP) memory during manufacturing or configured in-system via I2C/SPI for additional BOM flexibility.
The Cascade™ SiT95145 is a single-chip MEMS jitter cleaner that provides the highest level of clock tree integration and consolidates multiple clock ICs and oscillators into a single device. Its low noise quad-PLL architecture and programmable output drivers provide up to 10 differential or 20 LVCMOS low-jitter clock outputs. It supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input-to-output frequency translation configurations from 8 kHz to 2.1 GHz.
This jitter cleaner integrates SiTime’s third-generation ApexMEMS™ resonator. This integrated MEMS approach eliminates the dependency on a crystal reference, along with all quartz related issues. It enables a true clock-system-on-a-chip that improves system robustness:
- Always-accurate clock synthesis by eliminating crystal capacitive mismatch
- Always-reliable startup even at cold temperature and other harsh environmental conditions
- No jitter degradation due to noise coupling onto a crystal interface
- No activity dips/frequency jumps inherent to quartz
- 10x more resistant to vibration and board bending
The SiT95145 is supported by TimeMaster™ software to simplify clock tree design. The device can also be shipped with a user-specified, factory pre-programmed default startup configuration. The device configuration can be re-programmed twice using two banks of one-time-programmable (OTP) memory during manufacturing or configured in-system via I2C/SPI for additional BOM flexibility.
