Nexperia B.V. Dual D-type flip-flop with set and reset; positive-edge trigger 74LVC74APW,118

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Dual D-type flip-flop with set and reset; positive-edge trigger - 74LVC74APW,118 - Nexperia B.V.
Nijmegen, Netherlands
Dual D-type flip-flop with set and reset; positive-edge trigger
74LVC74APW,118
Dual D-type flip-flop with set and reset; positive-edge trigger 74LVC74APW,118
The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. Features and benefits 5 V tolerant inputs for interlacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs.

The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

Features and benefits

  • 5 V tolerant inputs for interlacing with 5 V logic
  • Wide supply voltage range from 1.2 V to 3.6 V
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Complies with JEDEC standard:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-B exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet
Integrated Circuits - 74LVC74APW,118 - LIXINC Electronics Co., Limited
Hong Kong, China
Integrated Circuits
74LVC74APW,118
Integrated Circuits 74LVC74APW,118
IC FF D-TYPE DUAL 1BIT 14TSSOP

IC FF D-TYPE DUAL 1BIT 14TSSOP

Supplier's Site Datasheet
Logic - Logic - Flip Flops - 74LVC74APW,118 - 1009465-74LVC74APW,118 - Win Source Electronics
Yishun, Singapore
Logic - Logic - Flip Flops - 74LVC74APW,118
1009465-74LVC74APW,118
Logic - Logic - Flip Flops - 74LVC74APW,118 1009465-74LVC74APW,118
Manufacturer: Nexperia USA Inc. Win Source Part Number: 1009465-74LVC74APW,1 18 Packaging: Reel - TR Type: D-Type Mounting: SMD (SMT) Output Type: Differential Current - Output High, Low: 24mA, 24mA Number of Elements: 2 Number of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 5.2ns @ 3.3V, 50pF Trigger Type: Positive Edge Current - Quiescent: 10μA Input Capacitance: 4pF Categories: Integrated Circuits Status: Active Temperature Range - Operating: -40°C to 125°C (TA) Dimension: 14-TSSOP (0.173", 4.40mm Width) Purpose: Set(Preset) and Reset Supply Voltage - Operating: 1.2 V to 3.6 V Max Frequency: 250MHz Popularity: Medium Fake Threat In the Open Market: 62 pct. Supply and Demand Status: Balance

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 1009465-74LVC74APW,118
Packaging: Reel - TR
Type: D-Type
Mounting: SMD (SMT)
Output Type: Differential
Current - Output High, Low: 24mA, 24mA
Number of Elements: 2
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 5.2ns @ 3.3V, 50pF
Trigger Type: Positive Edge
Current - Quiescent: 10μA
Input Capacitance: 4pF
Categories: Integrated Circuits
Status: Active
Temperature Range - Operating: -40°C to 125°C (TA)
Dimension: 14-TSSOP (0.173", 4.40mm Width)
Purpose: Set(Preset) and Reset
Supply Voltage - Operating: 1.2 V to 3.6 V
Max Frequency: 250MHz
Popularity: Medium
Fake Threat In the Open Market: 62 pct.
Supply and Demand Status: Balance

Supplier's Site Datasheet
Flip Flops - 1727-3110-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-3110-6-ND
Flip Flops 1727-3110-6-ND
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-3110-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-3110-1-ND
Flip Flops 1727-3110-1-ND
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-3110-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-3110-2-ND
Flip Flops 1727-3110-2-ND
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Supplier's Site Datasheet
Logic - Flip Flops - 74LVC74APW,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74LVC74APW,118
Logic - Flip Flops 74LVC74APW,118
IC FF D-TYPE DUAL 1BIT 14TSSOP

IC FF D-TYPE DUAL 1BIT 14TSSOP

Supplier's Site Datasheet
 - 74LVC74APW,118 - Rochester Electronics
Newburyport, MA, United States
Nexperia 74LVC74APW - D Flip-Flop, LVC/LCX/Z Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, TSSOP14

Nexperia 74LVC74APW - D Flip-Flop, LVC/LCX/Z Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, TSSOP14

Supplier's Site Datasheet
Flip Flops - 74LVC74APW,118 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flops
74LVC74APW,118
Flip Flops 74LVC74APW,118
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Supplier's Site Datasheet
Flip-Flop, D-Type, 120Mhz, Tssop-14; Logic Family / Base Number Nexperia - 93X4979 - Newark, An Avnet Company
Chicago, IL, United States
Flip-Flop, D-Type, 120Mhz, Tssop-14; Logic Family / Base Number Nexperia
93X4979
Flip-Flop, D-Type, 120Mhz, Tssop-14; Logic Family / Base Number Nexperia 93X4979
FLIP-FLOP, D-TYPE, 120MHZ, TSSOP-14; Logic Family / Base Number:74LVC74; Flip-Flop Type:D; Propagation Delay:-; Frequency:120MHz; Output Current:50mA; Logic Case Style:TSSOP; No. of Pins:14Pins; Trigger Type:Positive Edge; IC Output RoHS Compliant: Yes

FLIP-FLOP, D-TYPE, 120MHZ, TSSOP-14; Logic Family / Base Number:74LVC74; Flip-Flop Type:D; Propagation Delay:-; Frequency:120MHz; Output Current:50mA; Logic Case Style:TSSOP; No. of Pins:14Pins; Trigger Type:Positive Edge; IC Output RoHS Compliant: Yes

Supplier's Site Datasheet
Flip-Flop, D-Type, 250Mhz, Tssop-14; Flip-Flop Type Nexperia - 04AJ5943 - Newark, An Avnet Company
Chicago, IL, United States
Flip-Flop, D-Type, 250Mhz, Tssop-14; Flip-Flop Type Nexperia
04AJ5943
Flip-Flop, D-Type, 250Mhz, Tssop-14; Flip-Flop Type Nexperia 04AJ5943
FLIP-FLOP, D-TYPE, 250MHZ, TSSOP-14; Flip-Flop Type:D; Propagation Delay:-; Frequency:120MHz; Output Current:50mA; Logic Case Style:TSSOP; No. of Pins:14Pins; Trigger Type:Positive Edge; IC Output Type:Complementary; Supply Voltage RoHS Compliant: Yes

FLIP-FLOP, D-TYPE, 250MHZ, TSSOP-14; Flip-Flop Type:D; Propagation Delay:-; Frequency:120MHz; Output Current:50mA; Logic Case Style:TSSOP; No. of Pins:14Pins; Trigger Type:Positive Edge; IC Output Type:Complementary; Supply Voltage RoHS Compliant: Yes

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. LIXINC Electronics Co., Limited Win Source Electronics DigiKey Lingto Electronic Limited Rochester Electronics Quarktwin Technology Ltd. Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LVC74APW,118 74LVC74APW,118 1009465-74LVC74APW,118 1727-3110-6-ND 74LVC74APW,118 74LVC74APW,118 74LVC74APW,118 93X4979
Product Name Dual D-type flip-flop with set and reset; positive-edge trigger Integrated Circuits Logic - Logic - Flip Flops - 74LVC74APW,118 Flip Flops Logic - Flip Flops Flip Flops Flip-Flop, D-Type, 120Mhz, Tssop-14; Logic Family / Base Number Nexperia
Flip-Flop Type D D D D D
Triggering Positive-edge Triggered Positive-edge Triggered; Positive Edge Positive-edge Triggered; Positive Edge Positive-edge Triggered Positive-edge Triggered
Supply Voltage 1.2V; 1.5V; 1.8V; 2.5V; 3V; 3.3V; 3.6V; 1.2 - 3.6 1.2V ~ 3.6V 1.2 V ~ 3.6 V 1.2V ~ 3.6V 3.6V; 1.2V ~ 3.6V
Features ESD Protection
Propagation Delay 2.5 ns 5.2 ns 5.2 ns 5.2 ns
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