Nexperia B.V. Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state 74LVC374AD,118

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Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state - 74LVC374AD,118 - Nexperia B.V.
Nijmegen, Netherlands
Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state
74LVC374AD,118
Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state 74LVC374AD,118
The 74LVC374A is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.2 V to 3.6 V Overvoltage tolerant inputs to 5.5 V CMOS low power dissipation Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation 8-bit positive edge-triggered register Independent register and 3-state buffer operation Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74LVC374A is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.2 V to 3.6 V
  • Overvoltage tolerant inputs to 5.5 V
  • CMOS low power dissipation
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • 8-bit positive edge-triggered register
  • Independent register and 3-state buffer operation
  • Complies with JEDEC standard:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet
Flip Flops - 1727-74LVC374AD,118CT-ND - DigiKey
Thief River Falls, MN, United States
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)

Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-74LVC374AD,118TR-ND - DigiKey
Thief River Falls, MN, United States
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)

Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-74LVC374AD,118DKR-ND - DigiKey
Thief River Falls, MN, United States
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)

Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)

Supplier's Site Datasheet
Yishun, Singapore
Integrated Circuits (ICs) - Logic - Flip Flops
1370969-74LVC374AD,118
Integrated Circuits (ICs) - Logic - Flip Flops 1370969-74LVC374AD,118
Win Source Part Number: 1370969-74LVC374AD,1 18 Category: Integrated Circuits (ICs) - Logic - Flip Flops Temperature Range - Operating: -40°C ~ 125°C (TA) Fake Threat In the Open Market: 60 pct. Type: D-Type MSL Level: 1 (Unlimited) Mfr: Nexperia USA Inc. Series: 74LVC Package: Tape & Reel Product Status: Active Package / Case: 20-SOIC (0.295", 7.50mm Width) Supplier Device Package: 20-SO Base Product Number: 74LVC374 Mounting Type: Surface Mount HTSUS: 8542.39.0001 REACH Status: REACH Unaffected ECCN: EAR99 Function: Standard Voltage - Supply: 1.65V ~ 3.6V Output Type: Tri-State, Non-Inverted Clock Frequency: 150 MHz Current - Quiescent (Iq): 10 µA Current - Output High, Low: 24mA, 24mA Max Propagation Delay @ V, Max CL: 7ns @ 3.3V, 50pF Number of Elements: 1 Number of Bits per Element: 8 Trigger Type: Positive Edge Input Capacitance: 4 pF

Win Source Part Number: 1370969-74LVC374AD,118
Category: Integrated Circuits (ICs) - Logic - Flip Flops
Temperature Range - Operating: -40°C ~ 125°C (TA)
Fake Threat In the Open Market: 60 pct.
Type: D-Type
MSL Level: 1 (Unlimited)
Mfr: Nexperia USA Inc.
Series: 74LVC
Package: Tape & Reel
Product Status: Active
Package / Case: 20-SOIC (0.295", 7.50mm Width)
Supplier Device Package: 20-SO
Base Product Number: 74LVC374
Mounting Type: Surface Mount
HTSUS: 8542.39.0001
REACH Status: REACH Unaffected
ECCN: EAR99
Function: Standard
Voltage - Supply: 1.65V ~ 3.6V
Output Type: Tri-State, Non-Inverted
Clock Frequency: 150 MHz
Current - Quiescent (Iq): 10 µA
Current - Output High, Low: 24mA, 24mA
Max Propagation Delay @ V, Max CL: 7ns @ 3.3V, 50pF
Number of Elements: 1
Number of Bits per Element: 8
Trigger Type: Positive Edge
Input Capacitance: 4 pF

Supplier's Site Datasheet
Flip Flops - 74LVC374AD,118 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flops
74LVC374AD,118
Flip Flops 74LVC374AD,118
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)

Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)

Supplier's Site Datasheet
Logic - Flip Flops - 74LVC374AD,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74LVC374AD,118
Logic - Flip Flops 74LVC374AD,118
IC FF D-TYPE SNGL 8BIT 20SO

IC FF D-TYPE SNGL 8BIT 20SO

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. DigiKey Win Source Electronics Quarktwin Technology Ltd. Lingto Electronic Limited
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LVC374AD,118 1727-74LVC374AD,118CT-ND 1370969-74LVC374AD,118 74LVC374AD,118 74LVC374AD,118
Product Name Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Logic - Flip Flops
Flip-Flop Type D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered; Positive Edge
Supply Voltage 1.2V; 1.5V; 1.8V; 2.5V; 3V; 3.3V; 3.6V; 1.2 - 3.6 1.65V ~ 3.6V 1.65V ~ 3.6V 3.6V; 1.65V ~ 3.6V
Output Characteristics 3-State 3-State
Features ESD Protection
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