Nexperia B.V. Single D-type flip-flop with set and reset; positive edge trigger 74LVC2G74GT,115

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Single D-type flip-flop with set and reset; positive edge trigger - 74LVC2G74GT,115 - Nexperia B.V.
Nijmegen, Netherlands
Single D-type flip-flop with set and reset; positive edge trigger
74LVC2G74GT,115
Single D-type flip-flop with set and reset; positive edge trigger 74LVC2G74GT,115
The 74LVC2G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ±24 mA output drive (VCC = 3.0 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74LVC2G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ±24 mA output drive (VCC = 3.0 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet
Yishun, Singapore
Logic - Logic - Flip Flops - 74LVC2G74GT,115
765758-74LVC2G74GT,115
Logic - Logic - Flip Flops - 74LVC2G74GT,115 765758-74LVC2G74GT,115
Manufacturer: Nexperia USA Inc. Win Source Part Number: 765758-74LVC2G74GT,1 15 Series: 74LVC Packaging: Reel package Type: D-Type Operating Temperature Range: -40°C ~ 125°C (TA) Package: 8-XFDFN Mounting: SMD Output Type: Differential Current - Output High, Low: 32mA, 32mA Operating Supply Voltage: 1.65 V ~ 5.5 V Function: Set(Preset) and Reset Number of Elements: 1 Number of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 4.1ns @ 5V, 50pF Current - Quiescent: 40μA Input Capacitance: 4pF Family Name: 74LVC2G74 Categories: Integrated Circuits (ICs) Clock Frequency: 200MHz Alternative Parts (Cross-Reference): 74LVC2G74DC; 74LVC2G74GM; 74LVC2G74DP; Introduction Date: November 03, 2005 ECCN: EAR99 Country of Origin: Malaysia Estimated EOL Date: 2026 Halogen Free: Compliant Popularity: Medium Fake Threat In the Open Market: 42 pct. Supply and Demand Status: Limited

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 765758-74LVC2G74GT,115
Series: 74LVC
Packaging: Reel package
Type: D-Type
Operating Temperature Range: -40°C ~ 125°C (TA)
Package: 8-XFDFN
Mounting: SMD
Output Type: Differential
Current - Output High, Low: 32mA, 32mA
Operating Supply Voltage: 1.65 V ~ 5.5 V
Function: Set(Preset) and Reset
Number of Elements: 1
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 4.1ns @ 5V, 50pF
Current - Quiescent: 40μA
Input Capacitance: 4pF
Family Name: 74LVC2G74
Categories: Integrated Circuits (ICs)
Clock Frequency: 200MHz
Alternative Parts (Cross-Reference): 74LVC2G74DC; 74LVC2G74GM; 74LVC2G74DP;
Introduction Date: November 03, 2005
ECCN: EAR99
Country of Origin: Malaysia
Estimated EOL Date: 2026
Halogen Free: Compliant
Popularity: Medium
Fake Threat In the Open Market: 42 pct.
Supply and Demand Status: Limited

Supplier's Site Datasheet
Logic - Flip Flops - 74LVC2G74GT,115 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74LVC2G74GT,115
Logic - Flip Flops 74LVC2G74GT,115
IC FF D-TYPE SNGL 1BIT 8XSON

IC FF D-TYPE SNGL 1BIT 8XSON

Supplier's Site Datasheet
Integrated Circuits - 74LVC2G74GT,115 - LIXINC Electronics Co., Limited
Hong Kong, China
Integrated Circuits
74LVC2G74GT,115
Integrated Circuits 74LVC2G74GT,115
IC FF D-TYPE SNGL 1BIT 8XSON

IC FF D-TYPE SNGL 1BIT 8XSON

Supplier's Site Datasheet
Flip Flops - 74LVC2G74GT,115 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-XFDFN

Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-XFDFN

Supplier's Site Datasheet
Flip Flops - 1727-7031-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-7031-2-ND
Flip Flops 1727-7031-2-ND
Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-XFDFN

Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-XFDFN

Supplier's Site Datasheet
Flip Flops - 1727-7031-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-7031-6-ND
Flip Flops 1727-7031-6-ND
Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-XFDFN

Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-XFDFN

Supplier's Site Datasheet
Flip Flops - 1727-7031-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-7031-1-ND
Flip Flops 1727-7031-1-ND
Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-XFDFN

Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-XFDFN

Supplier's Site Datasheet
Flip Flop, D, -40 To 125Deg C Rohs Compliant Nexperia - 74AH2597 - Newark, An Avnet Company
Chicago, IL, United States
Flip Flop, D, -40 To 125Deg C Rohs Compliant Nexperia
74AH2597
Flip Flop, D, -40 To 125Deg C Rohs Compliant Nexperia 74AH2597
FLIP FLOP, D, -40 TO 125DEG C ROHS COMPLIANT: YES

FLIP FLOP, D, -40 TO 125DEG C ROHS COMPLIANT: YES

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Win Source Electronics Lingto Electronic Limited LIXINC Electronics Co., Limited Quarktwin Technology Ltd. DigiKey Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LVC2G74GT,115 765758-74LVC2G74GT,115 74LVC2G74GT,115 74LVC2G74GT,115 74LVC2G74GT,115 1727-7031-2-ND 74AH2597
Product Name Single D-type flip-flop with set and reset; positive edge trigger Logic - Logic - Flip Flops - 74LVC2G74GT,115 Logic - Flip Flops Integrated Circuits Flip Flops Flip Flops Flip Flop, D, -40 To 125Deg C Rohs Compliant Nexperia
Flip-Flop Type D D D D
Triggering Positive-edge Triggered Positive-edge Triggered; Positive Edge Positive-edge Triggered
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 1.65 V ~ 5.5 V 1.65V ~ 5.5V 1.65V ~ 5.5V 1.65V ~ 5.5V
Features ESD Protection
Propagation Delay 3.5 ns 4.1 ns 4.1 ns 4.1 ns
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