Nexperia B.V. Single D-type flip-flop with set and reset; positive edge trigger 74LVC2G74DC-Q100H

Request a Quote Datasheet

Suppliers

Company
Product
Description
Supplier Links
Single D-type flip-flop with set and reset; positive edge trigger - 74LVC2G74DC-Q100H - Nexperia B.V.
Nijmegen, Netherlands
Single D-type flip-flop with set and reset; positive edge trigger
74LVC2G74DC-Q100H
Single D-type flip-flop with set and reset; positive edge trigger 74LVC2G74DC-Q100H
The 74LVC2G74-Q100 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) ±24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation

The 74LVC2G74-Q100 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
Supplier's Site Datasheet
 - 74LVC2G74DC-Q100H - Rochester Electronics
Newburyport, MA, United States
D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO8

D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO8

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74LVC2G74DC-Q100H - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74LVC2G74DC-Q100H
Integrated Circuits (ICs) - Logic - Flip Flops 74LVC2G74DC-Q100H
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site
Yishun, Singapore
Integrated Circuits (ICs) - Logic - Flip Flops
1370950-74LVC2G74DC-Q100H
Integrated Circuits (ICs) - Logic - Flip Flops 1370950-74LVC2G74DC-Q100H
Win Source Part Number: 1370950-74LVC2G74DC- Q100H Category: Integrated Circuits (ICs) - Logic - Flip Flops Temperature Range - Operating: -40°C ~ 125°C (TA) Fake Threat In the Open Market: 30 pct. Type: D-Type MSL Level: 1 (Unlimited) Mfr: Nexperia USA Inc. Series: Automotive, AEC-Q100, 74LVC Package: Tape & Reel Product Status: Active Package / Case: 8-VFSOP (0.091", 2.30mm Width) Supplier Device Package: 8-VSSOP Base Product Number: 74LVC2G74 Mounting Type: Surface Mount HTSUS: 8542.39.0001 REACH Status: REACH Unaffected ECCN: EAR99 Function: Set(Preset) and Reset Voltage - Supply: 1.65V ~ 5.5V Output Type: Complementary Clock Frequency: 200 MHz Current - Quiescent (Iq): 40 µA Current - Output High, Low: 32mA, 32mA Max Propagation Delay @ V, Max CL: 4.1ns @ 5V, 50pF Number of Elements: 1 Number of Bits per Element: 1 Trigger Type: Positive Edge Input Capacitance: 4 pF

Win Source Part Number: 1370950-74LVC2G74DC-Q100H
Category: Integrated Circuits (ICs) - Logic - Flip Flops
Temperature Range - Operating: -40°C ~ 125°C (TA)
Fake Threat In the Open Market: 30 pct.
Type: D-Type
MSL Level: 1 (Unlimited)
Mfr: Nexperia USA Inc.
Series: Automotive, AEC-Q100, 74LVC
Package: Tape & Reel
Product Status: Active
Package / Case: 8-VFSOP (0.091", 2.30mm Width)
Supplier Device Package: 8-VSSOP
Base Product Number: 74LVC2G74
Mounting Type: Surface Mount
HTSUS: 8542.39.0001
REACH Status: REACH Unaffected
ECCN: EAR99
Function: Set(Preset) and Reset
Voltage - Supply: 1.65V ~ 5.5V
Output Type: Complementary
Clock Frequency: 200 MHz
Current - Quiescent (Iq): 40 µA
Current - Output High, Low: 32mA, 32mA
Max Propagation Delay @ V, Max CL: 4.1ns @ 5V, 50pF
Number of Elements: 1
Number of Bits per Element: 1
Trigger Type: Positive Edge
Input Capacitance: 4 pF

Supplier's Site Datasheet
Flip Flops - 74LVC2G74DC-Q100H - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-VFSOP (0.091", 2.30mm Width)

Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-VFSOP (0.091", 2.30mm Width)

Supplier's Site Datasheet
Logic - Flip Flops - 74LVC2G74DC-Q100H - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74LVC2G74DC-Q100H
Logic - Flip Flops 74LVC2G74DC-Q100H
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
Flip Flops - 1727-74LVC2G74DC-Q100HTR-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia - 74AH2596 - Newark, An Avnet Company
Chicago, IL, United States
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia
74AH2596
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia 74AH2596
FLIP FLOP, AEC-Q100, D, -40 TO 125DEG C ROHS COMPLIANT: YES

FLIP FLOP, AEC-Q100, D, -40 TO 125DEG C ROHS COMPLIANT: YES

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Rochester Electronics Shenzhen Shengyu Electronics Technology Limited Win Source Electronics Quarktwin Technology Ltd. Lingto Electronic Limited DigiKey Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LVC2G74DC-Q100H 74LVC2G74DC-Q100H 74LVC2G74DC-Q100H 1370950-74LVC2G74DC-Q100H 74LVC2G74DC-Q100H 74LVC2G74DC-Q100H 1727-74LVC2G74DC-Q100HTR-ND 74AH2596
Product Name Single D-type flip-flop with set and reset; positive edge trigger Integrated Circuits (ICs) - Logic - Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Logic - Flip Flops Flip Flops Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia
Flip-Flop Type D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered; Positive Edge Positive-edge Triggered
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 1.65V ~ 5.5V 1.65V ~ 5.5V 1.65V ~ 5.5V
Features ESD Protection
Propagation Delay 3.5 ns 4.1 ns 4.1 ns
Unlock Full Specs
to access all available technical data

Similar Products

Single D-type flip-flop with reset; positive-edge trigger - 74LVC1G175GV-Q100H - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5
View Details
6 suppliers
Single D-type flip-flop; positive-edge trigger - 74AHC1G79GW,125 - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 5.5
View Details
8 suppliers
Dual JK flip-flop with reset; negative-edge trigger - 74HC73PW,118 - Nexperia B.V.
Specs
Flip-Flop Type J-K
Triggering Negative-edge Triggered
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0
View Details
9 suppliers
Octal D-type flip-flop; positive-edge trigger; 3-state - 74ALVC374PW,118 - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 1.65 - 3.6
View Details
8 suppliers