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Nexperia B.V. Single D-type flip-flop; positive-edge trigger 74LVC1G79GX,125

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Single D-type flip-flop; positive-edge trigger - 74LVC1G79GX,125 - Nexperia B.V.
Nijmegen, Netherlands
Single D-type flip-flop; positive-edge trigger
74LVC1G79GX,125
Single D-type flip-flop; positive-edge trigger 74LVC1G79GX,125
The 74LVC1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low power dissipation ±24 mA output drive (VCC = 3.0 V) Direct interface with TTL levels Latch-up performance exceeds 250 mA IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C.

The 74LVC1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • CMOS low power dissipation
  • ±24 mA output drive (VCC = 3.0 V)
  • Direct interface with TTL levels
  • Latch-up performance exceeds 250 mA
  • IOFF circuitry provides partial Power-down mode operation
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
    • JESD36 (4.5 V to 5.5 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C.
Supplier's Site Datasheet
Logic - Flip Flops - 74LVC1G79GX,125 - Nova Technology(HK) Co.,Ltd
Futian District, Shenzhen, China
Logic - Flip Flops
74LVC1G79GX,125
Logic - Flip Flops 74LVC1G79GX,125
Flip Flop Element Bit

Flip Flop Element Bit

Supplier's Site Datasheet
Flip Flops - 74LVC1G79GX,125 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 1 Element D-Type 1 Bit Positive Edge 4-XFDFN Exposed Pad

Flip Flop 1 Element D-Type 1 Bit Positive Edge 4-XFDFN Exposed Pad

Supplier's Site Datasheet
Flip Flops - 74LVC1G79GX,125 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 1 Element D-Type 1 Bit Positive Edge 4-XFDFN Exposed Pad

Flip Flop 1 Element D-Type 1 Bit Positive Edge 4-XFDFN Exposed Pad

Supplier's Site Datasheet
 - 74LVC1G79GX,125 - Rochester Electronics
Newburyport, MA, United States
Nexperia 74LVC1G79GX - D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 1-Bit, True Output, SON-5

Nexperia 74LVC1G79GX - D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 1-Bit, True Output, SON-5

Supplier's Site Datasheet
Logic - Flip Flops - 74LVC1G79GX,125 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74LVC1G79GX,125
Logic - Flip Flops 74LVC1G79GX,125
IC FF D-TYPE SNGL 1BIT 5X2SON

IC FF D-TYPE SNGL 1BIT 5X2SON

Supplier's Site Datasheet
Flip Flops - 1727-74LVC1G79GX,125TR-ND - DigiKey
Thief River Falls, MN, United States
Flip Flop 1 Element D-Type 1 Bit Positive Edge 4-XFDFN Exposed Pad

Flip Flop 1 Element D-Type 1 Bit Positive Edge 4-XFDFN Exposed Pad

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Nova Technology(HK) Co.,Ltd Quarktwin Technology Ltd. Rochester Electronics Lingto Electronic Limited DigiKey
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LVC1G79GX,125 74LVC1G79GX,125 74LVC1G79GX,125 74LVC1G79GX,125 74LVC1G79GX,125 1727-74LVC1G79GX,125TR-ND
Product Name Single D-type flip-flop; positive-edge trigger Logic - Flip Flops Flip Flops Logic - Flip Flops Flip Flops
Flip-Flop Type D D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 1.65V ~ 5.5V 1.65V ~ 5.5V
Features ESD Protection
Propagation Delay 2.2 ns 3.8 ns
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