Nexperia B.V. Single D-type flip-flop with set and reset; positive edge trigger 74LVC1G74DC,125

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Single D-type flip-flop with set and reset; positive edge trigger - 74LVC1G74DC,125 - Nexperia B.V.
Nijmegen, Netherlands
Single D-type flip-flop with set and reset; positive edge trigger
74LVC1G74DC,125
Single D-type flip-flop with set and reset; positive edge trigger 74LVC1G74DC,125
The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity ±24 mA output drive (VCC = 3.0 V) CMOS low power consumption Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 250 mA
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet
Logic - Flip Flops -  - Nova Technology(HK) Co.,Ltd
Futian District, Shenzhen, China
Logic - Flip Flops
Logic - Flip Flops
Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-VFSOP (0.091

Flip Flop 1 Element D-Type 1 Bit Positive Edge 8-VFSOP (0.091

Supplier's Site Datasheet
 - 510550 - RS Components, Ltd.
Corby, Northants, United Kingdom
Low-Voltage CMOS logic. Single gate package. Operating Voltage: 1.65 to 5.5 V. Compatibility: Input LVTTL/TTL, Output LVCMOS Logic Family = LVC Logic Function = D Type Input Type = Single Ended Output Signal Type = Differential Triggering Type = Positive Edge Polarity = Inverting, Non-Inverting Mounting Type = Surface Mount Package Type = VSSOP Pin Count = 8 Set/Reset = Yes

Low-Voltage CMOS logic. Single gate package. Operating Voltage: 1.65 to 5.5 V. Compatibility: Input LVTTL/TTL, Output LVCMOS
Logic Family = LVC
Logic Function = D Type
Input Type = Single Ended
Output Signal Type = Differential
Triggering Type = Positive Edge
Polarity = Inverting, Non-Inverting
Mounting Type = Surface Mount
Package Type = VSSOP
Pin Count = 8
Set/Reset = Yes

Supplier's Site
Flip Flops - 1727-4029-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4029-1-ND
Flip Flops 1727-4029-1-ND
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
Flip Flops - 1727-4029-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4029-6-ND
Flip Flops 1727-4029-6-ND
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
Flip Flops - 1727-4029-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4029-2-ND
Flip Flops 1727-4029-2-ND
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
IC FF D-TYPE SNGL 1BIT 8VSSOP - 554-74LVC1G74DC,125 - Utmel Electronic Limited
Hong Kong, China
IC FF D-TYPE SNGL 1BIT 8VSSOP
554-74LVC1G74DC,125
IC FF D-TYPE SNGL 1BIT 8VSSOP 554-74LVC1G74DC,125
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site
Logic - Flip Flops - 74LVC1G74DC,125 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74LVC1G74DC,125
Logic - Flip Flops 74LVC1G74DC,125
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
74LVC Series 5.5 V SMT Single D-Type Flip-Flop; Positive-Edge Trigger - VSSOP-8

74LVC Series 5.5 V SMT Single D-Type Flip-Flop; Positive-Edge Trigger - VSSOP-8

Supplier's Site Datasheet
Flip-Flop, D-Type, 280Mhz, Vssop-8; Logic Family / Base Number Nexperia - 85X3002 - Newark, An Avnet Company
Chicago, IL, United States
Flip-Flop, D-Type, 280Mhz, Vssop-8; Logic Family / Base Number Nexperia
85X3002
Flip-Flop, D-Type, 280Mhz, Vssop-8; Logic Family / Base Number Nexperia 85X3002
FLIP-FLOP, D-TYPE, 280MHZ, VSSOP-8; Logic Family / Base Number:74LVC1G74; Flip-Flop Type:D; Propagation Delay:-; Frequency:280MHz; Output Current:50mA; Logic Case Style:VSSOP; No. of Pins:8Pins; Trigger Type:Positive Edge; IC Output RoHS Compliant: Yes

FLIP-FLOP, D-TYPE, 280MHZ, VSSOP-8; Logic Family / Base Number:74LVC1G74; Flip-Flop Type:D; Propagation Delay:-; Frequency:280MHz; Output Current:50mA; Logic Case Style:VSSOP; No. of Pins:8Pins; Trigger Type:Positive Edge; IC Output RoHS Compliant: Yes

Supplier's Site Datasheet
Flip-Flop, D-Type, 200Mhz, Vssop-8; Logic Family / Base Number Nexperia - 30AK3240 - Newark, An Avnet Company
Chicago, IL, United States
Flip-Flop, D-Type, 200Mhz, Vssop-8; Logic Family / Base Number Nexperia
30AK3240
Flip-Flop, D-Type, 200Mhz, Vssop-8; Logic Family / Base Number Nexperia 30AK3240
FLIP-FLOP, D-TYPE, 200MHZ, VSSOP-8; Logic Family / Base Number:74LVC1G74; Flip-Flop Type:D; Propagation Delay:-; Frequency:200MHz; Output Current:50mA; Logic Case Style:VSSOP; No. of Pins:8Pins; Trigger Type:Positive Edge; IC Output RoHS Compliant: Yes

FLIP-FLOP, D-TYPE, 200MHZ, VSSOP-8; Logic Family / Base Number:74LVC1G74; Flip-Flop Type:D; Propagation Delay:-; Frequency:200MHz; Output Current:50mA; Logic Case Style:VSSOP; No. of Pins:8Pins; Trigger Type:Positive Edge; IC Output RoHS Compliant: Yes

Supplier's Site

Technical Specifications

  Nexperia B.V. Nova Technology(HK) Co.,Ltd RS Components, Ltd. DigiKey Utmel Electronic Limited Lingto Electronic Limited Shenzhen Shengyu Electronics Technology Limited Newark, An Avnet Company Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LVC1G74DC,125 510550 1727-4029-1-ND 554-74LVC1G74DC,125 74LVC1G74DC,125 74LVC1G74DC,125 85X3002 30AK3240
Product Name Single D-type flip-flop with set and reset; positive edge trigger Logic - Flip Flops Flip Flops IC FF D-TYPE SNGL 1BIT 8VSSOP Logic - Flip Flops Others Flip-Flop, D-Type, 280Mhz, Vssop-8; Logic Family / Base Number Nexperia Flip-Flop, D-Type, 200Mhz, Vssop-8; Logic Family / Base Number Nexperia
Flip-Flop Type D D D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 1.65V ~ 5.5V -3.3V; 3V; 1.8V 5.5 V
Features ESD Protection
Propagation Delay 3.5 ns 4.1 ns 3.5 ns 3.5 ns
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