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Nexperia B.V. 1-of-2 decoder/demultiplexer 74LVC1G19GV,125

Description
The 74LVC1G19 is a 1-of-2 decoder/demultiplexe r with a common output enable. This device buffers the data on input A and passes it to the outputs 1Y (true) and 2Y (complement) when the enable (E) input signal is LOW. A HIGH E causes both outputs to assume a HIGH state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity ±24 mA output drive (VCC = 3.0 V) CMOS low power dissipation Latch-up performance exceeds 250 mA Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C.
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Suppliers

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Product
Description
Supplier Links
1-of-2 decoder/demultiplexer - 74LVC1G19GV,125 - Nexperia B.V.
Nijmegen, Netherlands
1-of-2 decoder/demultiplexer
74LVC1G19GV,125
1-of-2 decoder/demultiplexer 74LVC1G19GV,125
The 74LVC1G19 is a 1-of-2 decoder/demultiplexe r with a common output enable. This device buffers the data on input A and passes it to the outputs 1Y (true) and 2Y (complement) when the enable (E) input signal is LOW. A HIGH E causes both outputs to assume a HIGH state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity ±24 mA output drive (VCC = 3.0 V) CMOS low power dissipation Latch-up performance exceeds 250 mA Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C.

The 74LVC1G19 is a 1-of-2 decoder/demultiplexer with a common output enable. This device buffers the data on input A and passes it to the outputs 1Y (true) and 2Y (complement) when the enable (E) input signal is LOW. A HIGH E causes both outputs to assume a HIGH state.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices in a mixed 3.3 V and 5 V environment.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power dissipation
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
    • JESD36 (4.5 V to 5.5 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C.
Supplier's Site Datasheet
Decoder/demultiplexer, 1 Nexperia - 85X2997 - Newark, An Avnet Company
Chicago, IL, United States
Decoder/demultiplexer, 1 Nexperia
85X2997
Decoder/demultiplexer, 1 Nexperia 85X2997
DECODER/DEMULTIPLEXE R, 1:2, TSOP-6; Logic Family / Base Number:-; Logic Type:1-to-2 Line Decoder / Demultiplexer; No. of Outputs:2Outputs; Logic Case Style:TSOP; No. of Pins:6Pins; Supply Voltage Min:1.65V; Supply Voltage Max:5.5V; RoHS Compliant: Yes

DECODER/DEMULTIPLEXER, 1:2, TSOP-6; Logic Family / Base Number:-; Logic Type:1-to-2 Line Decoder / Demultiplexer; No. of Outputs:2Outputs; Logic Case Style:TSOP; No. of Pins:6Pins; Supply Voltage Min:1.65V; Supply Voltage Max:5.5V; RoHS Compliant: Yes

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Newark, An Avnet Company
Product Category Logic Decoders and Demultiplexers Logic Decoders and Demultiplexers
Product Number 74LVC1G19GV,125 85X2997
Product Name 1-of-2 decoder/demultiplexer Decoder/demultiplexer, 1 Nexperia
Function Decoder/Demultiplexer Decoder
Supply Voltage 1.2V; 1.5V; 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 5.5V
Features ESD Protection
Package Type SOT457 TSOP
Logic Family TTL; CMOS; CMOS/LVTTL
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