Nexperia B.V. Single D-type flip-flop with reset; positive-edge trigger 74LVC1G175GV,125

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Single D-type flip-flop with reset; positive-edge trigger - 74LVC1G175GV,125 - Nexperia B.V.
Nijmegen, Netherlands
Single D-type flip-flop with reset; positive-edge trigger
74LVC1G175GV,125
Single D-type flip-flop with reset; positive-edge trigger 74LVC1G175GV,125
The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output. The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Overvoltage tolerant inputs to 5.5 V ±24 mA output drive (VCC = 3.0 V) CMOS low power dissipation Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C.

The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output.

The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V
  • High noise immunity
  • Overvoltage tolerant inputs to 5.5 V
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power dissipation
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 250 mA
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
    • JESD36 (4.5 V to 5.5 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C.
Supplier's Site Datasheet
Flip Flops - 1727-6068-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6068-6-ND
Flip Flops 1727-6068-6-ND
Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74, SOT-457

Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74, SOT-457

Supplier's Site Datasheet
Flip Flops - 1727-6068-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6068-1-ND
Flip Flops 1727-6068-1-ND
Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74, SOT-457

Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74, SOT-457

Supplier's Site Datasheet
Flip Flops - 1727-6068-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6068-2-ND
Flip Flops 1727-6068-2-ND
Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74, SOT-457

Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74, SOT-457

Supplier's Site Datasheet
Yishun, Singapore
Logic - Logic - Flip Flops - 74LVC1G175GV,125
1009240-74LVC1G175GV,125
Logic - Logic - Flip Flops - 74LVC1G175GV,125 1009240-74LVC1G175GV,125
Manufacturer: Nexperia USA Inc. Win Source Part Number: 1009240-74LVC1G175GV ,125 Packaging: Reel - TR Type: D-Type Mounting: SMD (SMT) Output Type: Non-Inverted Current - Output High, Low: 32mA, 32mA Number of Elements: 1 Number of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 4ns @ 5V, 50pF Trigger Type: Positive Edge Current - Quiescent: 40μA Input Capacitance: 2.5pF Categories: Integrated Circuits Status: Active Temperature Range - Operating: -40°C to 125°C (TA) Dimension: SC-74, SOT-457 Purpose: Reset Supply Voltage - Operating: 1.65 V to 5.5 V Max Frequency: 200MHz Popularity: Medium Fake Threat In the Open Market: 69 pct. Supply and Demand Status: Sufficient

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 1009240-74LVC1G175GV,125
Packaging: Reel - TR
Type: D-Type
Mounting: SMD (SMT)
Output Type: Non-Inverted
Current - Output High, Low: 32mA, 32mA
Number of Elements: 1
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 4ns @ 5V, 50pF
Trigger Type: Positive Edge
Current - Quiescent: 40μA
Input Capacitance: 2.5pF
Categories: Integrated Circuits
Status: Active
Temperature Range - Operating: -40°C to 125°C (TA)
Dimension: SC-74, SOT-457
Purpose: Reset
Supply Voltage - Operating: 1.65 V to 5.5 V
Max Frequency: 200MHz
Popularity: Medium
Fake Threat In the Open Market: 69 pct.
Supply and Demand Status: Sufficient

Supplier's Site Datasheet
Logic - Flip Flops - 74LVC1G175GV,125 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74LVC1G175GV,125
Logic - Flip Flops 74LVC1G175GV,125
IC FF D-TYPE SNGL 1BIT 6TSOP

IC FF D-TYPE SNGL 1BIT 6TSOP

Supplier's Site Datasheet
Flip Flops - 74LVC1G175GV,125 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74, SOT-457

Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74, SOT-457

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74LVC1G175GV,125 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74LVC1G175GV,125
Integrated Circuits (ICs) - Logic - Flip Flops 74LVC1G175GV,125
IC FF D-TYPE SNGL 1BIT 6TSOP

IC FF D-TYPE SNGL 1BIT 6TSOP

Supplier's Site
Flip-Flop, D-Type, 300Mhz, Sc-74-6; Logic Family / Base Number Nexperia - 85X2993 - Newark, An Avnet Company
Chicago, IL, United States
Flip-Flop, D-Type, 300Mhz, Sc-74-6; Logic Family / Base Number Nexperia
85X2993
Flip-Flop, D-Type, 300Mhz, Sc-74-6; Logic Family / Base Number Nexperia 85X2993
FLIP-FLOP, D-TYPE, 300MHZ, SC-74-6; Logic Family / Base Number:74LVC1G175; Flip-Flop Type:D; Propagation Delay:-; Frequency:300MHz; Output Current:50mA; Logic Case Style:SC-74; No. of Pins:6Pins; Trigger Type:Positive Edge; IC OutputRoHS Compliant: Yes

FLIP-FLOP, D-TYPE, 300MHZ, SC-74-6; Logic Family / Base Number:74LVC1G175; Flip-Flop Type:D; Propagation Delay:-; Frequency:300MHz; Output Current:50mA; Logic Case Style:SC-74; No. of Pins:6Pins; Trigger Type:Positive Edge; IC OutputRoHS Compliant: Yes

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. DigiKey Win Source Electronics Lingto Electronic Limited Quarktwin Technology Ltd. Shenzhen Shengyu Electronics Technology Limited Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LVC1G175GV,125 1727-6068-6-ND 1009240-74LVC1G175GV,125 74LVC1G175GV,125 74LVC1G175GV,125 74LVC1G175GV,125 85X2993
Product Name Single D-type flip-flop with reset; positive-edge trigger Flip Flops Logic - Logic - Flip Flops - 74LVC1G175GV,125 Logic - Flip Flops Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Flip-Flop, D-Type, 300Mhz, Sc-74-6; Logic Family / Base Number Nexperia
Flip-Flop Type D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered; Positive Edge
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 1.65V ~ 5.5V 1.65 V ~ 5.5 V 1.65V ~ 5.5V
Features ESD Protection
Propagation Delay 3.1 ns 4 ns 4 ns
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