Nexperia B.V. Dual D-type flip-flop with set and reset; positive edge-trigger 74HCT74D-Q100,118

Description
The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, will be stored in the flip-flop and appear at the nQ output. The Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Input levels: For 74HC74-Q100: CMOS level For 74HCT74-Q100: TTL level Symmetrical output impedance Low power dissipation High noise immunity Balanced propagation delays Specified in compliance with JEDEC standard no. 7A ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
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Description
The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, will be stored in the flip-flop and appear at the nQ output. The Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Input levels: For 74HC74-Q100: CMOS level For 74HCT74-Q100: TTL level Symmetrical output impedance Low power dissipation High noise immunity Balanced propagation delays Specified in compliance with JEDEC standard no. 7A ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
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Suppliers

Company
Product
Description
Supplier Links
Dual D-type flip-flop with set and reset; positive edge-trigger - 74HCT74D-Q100,118 - Nexperia B.V.
Nijmegen, Netherlands
Dual D-type flip-flop with set and reset; positive edge-trigger
74HCT74D-Q100,118
Dual D-type flip-flop with set and reset; positive edge-trigger 74HCT74D-Q100,118
The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, will be stored in the flip-flop and appear at the nQ output. The Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Input levels: For 74HC74-Q100: CMOS level For 74HCT74-Q100: TTL level Symmetrical output impedance Low power dissipation High noise immunity Balanced propagation delays Specified in compliance with JEDEC standard no. 7A ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, will be stored in the flip-flop and appear at the nQ output. The Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Input levels:
    • For 74HC74-Q100: CMOS level
    • For 74HCT74-Q100: TTL level
  • Symmetrical output impedance
  • Low power dissipation
  • High noise immunity
  • Balanced propagation delays
  • Specified in compliance with JEDEC standard no. 7A
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
Supplier's Site Datasheet
Flip Flops - 1727-74HCT74D-Q100,118TR-ND - DigiKey
Thief River Falls, MN, United States
"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154"", 3.90mm Width)"

"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154"", 3.90mm Width)"

Buy Now Datasheet
Flip Flops - 1727-74HCT74D-Q100,118CT-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE DUAL 1BIT 14SO

IC FF D-TYPE DUAL 1BIT 14SO

Buy Now Datasheet
Flip Flops - 1727-74HCT74D-Q100,118DKR-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE DUAL 1BIT 14SO

IC FF D-TYPE DUAL 1BIT 14SO

Buy Now Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74HCT74D-Q100,118 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74HCT74D-Q100,118
Integrated Circuits (ICs) - Logic - Flip Flops 74HCT74D-Q100,118
IC FF D-TYPE DUAL 1BIT 14SO

IC FF D-TYPE DUAL 1BIT 14SO

Supplier's Site
Flip Flops - 74HCT74D-Q100,118 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width)

Buy Now Datasheet
 - 74HCT74D-Q100,118 - Rochester Electronics
Newburyport, MA, United States
D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14

D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14

Supplier's Site Datasheet
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia - 74AH2400 - Newark, An Avnet Company
Chicago, IL, United States
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia
74AH2400
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia 74AH2400
FLIP FLOP, AEC-Q100, D, -40 TO 125DEG C ROHS COMPLIANT: YES

FLIP FLOP, AEC-Q100, D, -40 TO 125DEG C ROHS COMPLIANT: YES

Supplier's Site Datasheet
Logic - Flip Flops - 74HCT74D-Q100,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74HCT74D-Q100,118
Logic - Flip Flops 74HCT74D-Q100,118
IC FF D-TYPE DUAL 1BIT 14SO

IC FF D-TYPE DUAL 1BIT 14SO

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. DigiKey Shenzhen Shengyu Electronics Technology Limited Quarktwin Technology Ltd. Rochester Electronics Newark, An Avnet Company Lingto Electronic Limited
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74HCT74D-Q100,118 1727-74HCT74D-Q100,118TR-ND 74HCT74D-Q100,118 74HCT74D-Q100,118 74HCT74D-Q100,118 74AH2400 74HCT74D-Q100,118
Product Name Dual D-type flip-flop with set and reset; positive edge-trigger Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia Logic - Flip Flops
Flip-Flop Type D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered
Supply Voltage 5V; 4.5 - 5.5 4.5V ~ 5.5V 4.5V ~ 5.5V
Features ESD Protection
Propagation Delay 15 ns 44 ns
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